C8051F060-GQ Silicon Laboratories Inc, C8051F060-GQ Datasheet - Page 87

• Manufacturer Part Number: C8051F060-GQ
• Description: IC 8051 MCU 64K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F06xr

Specifications of C8051F060-GQ

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 59
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 2x16b, 8x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: CAN/I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F060DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 2-ch x 12-bit
• No. Of I/o's: 59
• Ram Memory Size: 4352Byte
• Cpu Speed: 25MHz
• No. Of Timers: 5
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1214 - DEV KIT FOR F060/F062/F063
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1213

7.
The ADC2 subsystem for the C8051F060/1/2/3 consists of an analog multiplexer (referred to as AMUX2),
and a 200 ksps, 10-bit successive-approximation-register ADC with integrated track-and-hold and pro-
grammable window detector (see block diagram in Figure 7.1). The AMUX2, data conversion modes, and
window detector can all be configured from within software via the Special Function Registers shown in
Figure 7.1. ADC2 operates in both Single-ended and Differential modes, and may be configured to mea-
sure any of the pins on Port 1, or the Temperature Sensor output. The ADC2 subsystem is enabled only
when the AD2EN bit in the ADC2 Control register (ADC2CN) is set to logic 1. The ADC2 subsystem is in
low power shutdown when this bit is logic 0.
AIN2.0
AIN2.1
AIN2.2
AIN2.3
AIN2.4
AIN2.5
AIN2.6
AIN2.7
10-Bit ADC (ADC2, C8051F060/1/2/3)
SENSOR
AGND
TEMP
AMX2CF
ADC2GTH
AMUX
(SE or
9-to-1
DIFF)
AMX2SL
Figure 7.1. ADC2 Functional Block Diagram
ADC2GTL
ADC2CF
ADC2LTH
Rev. 1.2
AD2EN
C8051F060/1/2/3/4/5/6/7
ADC
10-Bit
AV+
SAR
ADC2CN
ADC2LTL
Start Conversion
10
20
Comb.
00
01
10
11
10
Logic
AD2BUSY (W)
Timer 3 Overflow
CNVSTR2
Timer 2 Overflow
AD2WINT
87