C8051F060-GQ Silicon Laboratories Inc, C8051F060-GQ Datasheet - Page 218

• Manufacturer Part Number: C8051F060-GQ
• Description: IC 8051 MCU 64K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F06xr

Specifications of C8051F060-GQ

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 59
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 2x16b, 8x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: CAN/I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F060DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 2-ch x 12-bit
• No. Of I/o's: 59
• Ram Memory Size: 4352Byte
• Cpu Speed: 25MHz
• No. Of Timers: 5
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1214 - DEV KIT FOR F060/F062/F063
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1213

C8051F060/1/2/3/4/5/6/7
218
Bits7-0:
Note:
Bits7-0:
P3.7
R/W
R/W
Bit7
Bit7
P3.[7:0]: Port3 Output Latch Bits.
(Write - Output appears on I/O pins per XBR0, XBR1, XBR2, and XBR3 Registers)
0: Logic Low Output.
1: Logic High Output (open if corresponding P3MDOUT.n bit = 0).
(Read - Regardless of XBR0, XBR1, XBR2, and XBR3 Register settings).
0: P3.n pin is logic low.
1: P3.n pin is logic high.
Although P3 is not brought out to pins on the C8051F061/3/5/7 devices, the Port Data regis-
ter is still present and can be used by software. See “Configuring Ports which are not Pinned
Out” on page 219.
P3MDOUT.[7:0]: Port3 Output Mode Bits.
0: Port Pin output mode is configured as Open-Drain.
1: Port Pin output mode is configured as Push-Pull.
P3.6
R/W
R/W
Bit6
Bit6
Figure 18.18. P3MDOUT: Port3 Output Mode Register
P3.5
R/W
R/W
Bit5
Bit5
Figure 18.17. P3: Port3 Data Register
P3.4
R/W
R/W
Bit4
Bit4
Rev. 1.2
P3.3
R/W
R/W
Bit3
Bit3
P3.2
R/W
R/W
Bit2
Bit2
P3.1
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
SFR Page:
SFR Page:
P3.0
R/W
R/W
Bit0
Bit0
0xB0
All Pages
0xA7
F
Addressable
Reset Value
Reset Value
00000000
11111111
Bit