MC9S12C128CFUE Freescale Semiconductor, MC9S12C128CFUE Datasheet - Page 667

• Manufacturer Part Number: MC9S12C128CFUE
• Description: IC MCU 128K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C128CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 60
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/2.97V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4000 B
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 61
• Number Of Timers: 1
• Operating Supply Voltage: - 0.3 V to + 6.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

The loop bandwidth f
typical values are 50. ζ = 0.9 ensures a good transient response.
And finally the frequency relationship is defined as
With the above values the resistance can be calculated. The example is shown for a loop bandwidth
f
The capacitance C
The capacitance C
A.4.3.2
The basic functionality of the PLL is shown in
deviation from the reference clock f
The adjustment is done continuously with no abrupt changes in the clock output frequency. Noise, voltage,
temperature and other factors cause slight variations in the control loop resulting in a clock jitter. This jitter
affects the real minimum and maximum clock periods as illustrated in
Freescale Semiconductor
C
=10kHz:
R
Jitter Information
=
C
2 π n f
---------------------------- -
s
p
s
can now be calculated as:
should be chosen in the range of:
⋅ ⋅
C
f
=
C
K
should be chosen to fulfill the Gardner’s stability criteria by at least a factor of 10,
n
Φ
--------------------- -
π f
<
2 ζ
⋅
C
=
⋅
------------------------------------------
π
⋅
C
s
C
⋅
f
------------ -
⎛
⎝
VCO
⁄
f
⋅
2 ζ f
2
ζ
ref
20
R
= 2*π*50*10kHz/(316.7Hz/Ω)=9.9kΩ=~10kΩ
⋅ ⋅
+
ref
MC9S12C-Family / MC9S12GC-Family
≈
≤
is measured and input voltage to the VCO is adjusted accordingly.
=
0.516
-------------- - ζ
f
C
1
C
ref
p
+
2
⋅
≤
R
ζ
⋅
2
(
C
;
Figure
synr
⎞
⎠
(
s
Rev 01.24
⋅
⁄
---- -
10
=
10
1
0.9
+
A-3. With each transition of the clock f
→
1
)
f
)
f
C
C
C
p
= 5.19nF =~ 4.7nF
<
< 25kHz
= 470pF
= 50
------------ - ζ
4 10
f
ref
⋅
Figure
;
(
Appendix A Electrical Characteristics
=
A-4.
0.9
)
cmp
, the
667