MC9S12C128CFUE Freescale Semiconductor, MC9S12C128CFUE Datasheet - Page 479

IC MCU 128K FLASH 25MHZ 80-QFP

MC9S12C128CFUE

Manufacturer Part Number
MC9S12C128CFUE
Description
IC MCU 128K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12C128CFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4000 B
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
61
Number Of Timers
1
Operating Supply Voltage
- 0.3 V to + 6.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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To change the Flash protection that will be loaded on reset, the upper sector of the Flash array must be
unprotected, then the Flash protection byte located at Flash address 0xFF0D must be written to.
A protected Flash sector is disabled by FPHDIS while the size of the protected sector is defined by
FPHS[1:0] in the FPROT register.
Trying to alter any of the protected areas will result in a protect violation error and the PVIOL flag will be
set in the FSTAT register (see
when protection is fully disabled by setting the FPOPEN and FPHDIS bits. An attempt to mass erase a
Flash array while protection is enabled will set the PVIOL flag in the FSTAT register.
Freescale Semiconductor
FPHS[1:0]
FPOPEN
FPHDIS
NV[2:0]
Field
NV6
4–3
2–0
7
6
5
Protection Function for Program or Erase — The FPOPEN bit is used to either select an address range to be
protected using the FPHDIS and FPHS[1:0] bits or to select the same address range to be unprotected as shown
in
0 The FPHDIS bit allows a Flash address range to be unprotected
1 The FPHDIS bit allows a Flash address range to be protected
Nonvolatile Flag Bit — The NV6 bit should remain in the erased state for future enhancements.
Flash Protection Higher Address Range Disable — The FPHDIS bit determines whether there is a
protected/unprotected area in the higher space of the Flash address map.
0 Protection/unprotection enabled
1 Protection/unprotection disabled
Flash Protection Higher Address Size — The FPHS[1:0] bits determine the size of the protected/unprotected
sector as shown in
Nonvolatile Flag Bits — The NV[2:0] bits should remain in the erased state for future enhancements.
Table
17-9.
1. For range sizes refer to
FPOPEN
1
1
0
0
Table 17-10. Flash Protection Higher Address Range
Table
Section
FPHS[1:0]
17-10. The FPHS[1:0] bits can only be written to while the FPHDIS bit is set.
FPHDIS
Table 17-8. FPROT Field Descriptions
Table 17-9. Flash Protection Function
00
01
10
11
MC9S12C-Family / MC9S12GC-Family
1
0
1
0
17.3.2.6). A mass erase of the whole Flash array is only possible
FPHS1
0xF800–0xFFFF
0xF000–0xFFFF
0xE000–0xFFFF
0xC000–0xFFFF
Table
Address Range
x
x
x
x
Rev 01.24
17-10.
FPHS0
Description
x
x
x
x
No protection
Protect high range
Full Flash array protected
Unprotected high range
Range Size
16 Kbytes
2 Kbytes
4 Kbytes
8 Kbytes
Chapter 17 16 Kbyte Flash Module (S12FTS16KV1)
Function
(1)
479

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