HD64F3664FPV Renesas Electronics America, HD64F3664FPV Datasheet - Page 410

IC H8/3664 MCU FLASH 32K 64LQFP

HD64F3664FPV

Manufacturer Part Number
HD64F3664FPV
Description
IC H8/3664 MCU FLASH 32K 64LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets

Specifications of HD64F3664FPV

Core Size
16-Bit
Program Memory Size
32KB (32K x 8)
Oscillator Type
External
Core Processor
H8/300H
Speed
16MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
No. Of I/o's
29
Ram Memory Size
2KB
Cpu Speed
16MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
Item
12.6 Usage Notes 5.,
Figure 12.26 When
Compare Match and Bit
Manipulation Instruction to
TCRW Occur at the Same
Timing
Section 13 Watchdog
Timer
13.3 Operation
Figure 13.2 Watchdog
Timer Operation Example
Section 17 EEPROM
17.4.9 Read Operation
Figure 17.5 Current
Address Read Operation
Figure 17.6 Random
Address Read Operation
Figure 17.7 Sequential
Read Operation (when
current address read is
used)
Rev. 5.00, 03/04, page 382 of 388
Page
175
180
180
276
277
278
Revisions (See Manual for Details)
Added
The internal reset signal is output for a period of 256 φ
cycles. TCWD is a writable counter, and when a value is set in
TCWD, the count-up starts from that value.
256 φ
SCL
SDA
SCL
SDA
SCL
SDA
Legend: R/W: R/W code (0 is for a write and 1 is for a read)
condition
OSC
condition
Start
condition
Start
Start
ACK: acknowledge
1
clock cycles
1
Legend: R/W: R/W code (0 is for a write and 1 is for a read)
1
2
2
2
3
ACK: acknowledge
3
Slave address
Slave address
3
4
Slave address
4
5
4
5
6
5
6
7
6
7
R ACK
8
R/W ACK
8
7
9
9
R/W ACK
D7
1
8
Read Data
1
D7
Read Data
9
D0
8
1
D7
Read Data
ACK
9
8
D0
conditon
ACK
Stop
9
D0
8
. . . .
ACK
9
conditon
D7
1
Stop
Read Data
D0
OSC
8
ACK
9
clock
conditon
Stop

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