C8051F310-GQ Silicon Laboratories Inc, C8051F310-GQ Datasheet - Page 4

• Manufacturer Part Number: C8051F310-GQ
• Description: IC 8051 MCU 16K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F31xr

Specifications of C8051F310-GQ

• Core Size: 8-Bit
• Program Memory Size: 16KB (16K x 8)
• Oscillator Type: Internal
• Core Processor: 8051
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 29
• Program Memory Type: FLASH
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 21x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• No. Of I/o's: 29
• Ram Memory Size: 1280Byte
• Cpu Speed: 25MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 5
• Digital Ic Case: RoHS Compliant
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1445 - ADAPTER PROGRAM TOOLSTICK F310336-1329 - KIT REF DESIGN SENSORLESS BLDC336-1253 - DEV KIT FOR C8051F310/F311
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 336-1252

C8051F310/1/2/3/4/5
9. Reset Sources......................................................................................................... 97
10. Flash Memory ..................................................................................................... 103
11. External RAM ........................................................................................................ 109
12. Oscillators ............................................................................................................. 111
13. Port Input/Output ................................................................................................ 119
14. SMBus ................................................................................................................... 135
4
8.4. Power Management Modes .............................................................................. 94
9.1. Power-On Reset ............................................................................................... 98
9.2. Power-Fail Reset / VDD Monitor....................................................................... 99
9.3. External Reset ................................................................................................ 100
9.4. Missing Clock Detector Reset......................................................................... 100
9.5. Comparator0 Reset......................................................................................... 100
9.6. PCA Watchdog Timer Reset........................................................................... 100
9.7. Flash Error Reset............................................................................................ 100
9.8. Software Reset ............................................................................................... 101
10.1.Programming The Flash Memory ................................................................... 103
10.2.Non-volatile Data Storage .............................................................................. 105
10.3.Security Options ............................................................................................. 105
12.1.Programmable Internal Oscillator ................................................................... 111
12.2.External Oscillator Drive Circuit...................................................................... 114
12.3.System Clock Selection.................................................................................. 114
12.4.External Crystal Example ............................................................................... 116
12.5.External RC Example ..................................................................................... 117
12.6.External Capacitor Example ........................................................................... 117
13.1.Priority Crossbar Decoder .............................................................................. 121
13.2.Port I/O Initialization ....................................................................................... 123
13.3.General Purpose Port I/O ............................................................................... 126
14.1.Supporting Documents ................................................................................... 136
14.2.SMBus Configuration...................................................................................... 136
14.3.SMBus Operation ........................................................................................... 137
14.4.Using the SMBus............................................................................................ 139
8.3.4. Interrupt Latency ...................................................................................... 87
8.3.5. Interrupt Register Descriptions................................................................. 89
8.4.1. Idle Mode.................................................................................................. 94
8.4.2. Stop Mode ................................................................................................ 95
10.1.1.Flash Lock and Key Functions ............................................................... 103
10.1.2.Flash Erase Procedure .......................................................................... 103
10.1.3.Flash Write Procedure ........................................................................... 104
14.3.1.Arbitration............................................................................................... 137
14.3.2.Clock Low Extension.............................................................................. 138
14.3.3.SCL Low Timeout................................................................................... 138
14.3.4.SCL High (SMBus Free) Timeout .......................................................... 138
14.4.1.SMBus Configuration Register............................................................... 140
14.4.2.SMB0CN Control Register ..................................................................... 143
14.4.3.Data Register ......................................................................................... 146
Rev. 1.5