C8051F310-GQ Silicon Laboratories Inc, C8051F310-GQ Datasheet - Page 111

IC 8051 MCU 16K FLASH 32LQFP

C8051F310-GQ

Manufacturer Part Number
C8051F310-GQ
Description
IC 8051 MCU 16K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F31xr
Datasheets

Specifications of C8051F310-GQ

Core Size
8-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
8051
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
29
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 21x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
29
Ram Memory Size
1280Byte
Cpu Speed
25MHz
No. Of Timers
4
No. Of Pwm Channels
5
Digital Ic Case
RoHS Compliant
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1445 - ADAPTER PROGRAM TOOLSTICK F310336-1329 - KIT REF DESIGN SENSORLESS BLDC336-1253 - DEV KIT FOR C8051F310/F311
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1252

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0
12. Oscillators
C8051F31x devices include a programmable internal oscillator and an external oscillator drive circuit. The
internal oscillator can be enabled/disabled and calibrated using the OSCICN and OSCICL registers, as
shown in Figure 12.1. The system clock can be sourced by the external oscillator circuit, the internal oscil-
lator, or a scaled version of the internal oscillator. The internal oscillator's electrical specifications are given
in Table 12.1 on page 113.
12.1. Programmable Internal Oscillator
All C8051F31x devices include a programmable internal oscillator that defaults as the system clock after a
system reset. The internal oscillator period can be programmed via the OSCICL register as defined by
SFR Definition 12.1 OSCICL is factor calibrated to obtain a 24.5 MHz frequency.
Electrical specifications for the precision internal oscillator are given in Table 12.1 on page 113. Note that
the system clock may be derived from the programmed internal oscillator divided by 1, 2, 4, or 8, as
defined by the IFCN bits in register OSCICN. The divide value defaults to 8 following a reset.
VDD
Option 2
Option 3
XTAL2
XTAL2
Option 1
Option 4
XTAL2
10MΩ
Figure 12.1. Oscillator Diagram
XTAL1
XTAL2
OSCICL
Rev. 1.5
Circuit
Input
Programmable
Internal Clock
Generator
OSCXCN
OSC
EN
OSCICN
C8051F310/1/2/3/4/5
n
CLKSEL
SYSCLK
111

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