C8051F310-GQR Silicon Laboratories Inc, C8051F310-GQR Datasheet - Page 33
![no-image](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_sml.jpg)
C8051F310-GQR
Manufacturer Part Number
C8051F310-GQR
Description
IC 8051 MCU 16K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F31xr
Specifications of C8051F310-GQR
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
29
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 21x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
For Use With
336-1445 - ADAPTER PROGRAM TOOLSTICK F310336-1329 - KIT REF DESIGN SENSORLESS BLDC336-1253 - DEV KIT FOR C8051F310/F311
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F310-GQR
Manufacturer:
SILICON
Quantity:
3 300
Company:
Part Number:
C8051F310-GQR
Manufacturer:
SILICON41
Quantity:
120
Company:
Part Number:
C8051F310-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F310-GQR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
1.7.
The C8051F310/1/2/3/6 devices include an on-chip 10-bit SAR ADC with a 25-channel differential input
multiplexer. With a maximum throughput of 200 ksps, the ADC offers true 10-bit accuracy with an INL of
±1LSB. The ADC system includes a configurable analog multiplexer that selects both positive and nega-
tive ADC inputs. Ports1-3 are available as an ADC inputs; additionally, the on-chip Temperature Sensor
output and the power supply voltage (V
ADC to save power.
Conversions can be started in six ways: a software command, an overflow of Timer 0, 1, 2, or 3, or an
external convert start signal. This flexibility allows the start of conversion to be triggered by software
events, a periodic signal (timer overflows), or external HW signals. Conversion completions are indicated
by a status bit and an interrupt (if enabled). The resulting 10-bit data word is latched into the ADC data
SFRs upon completion of a conversion.
Window compare registers for the ADC data can be configured to interrupt the controller when ADC data is
either within or outside of a specified range. The ADC can monitor a key voltage continuously in back-
ground mode, but not interrupt the controller unless the converted data is within/outside the specified
range.
P1.6, P1.7 available on
P2.6, P2.7 available on
P1.6, P1.7 available on
P2.6, P2.7 available on
C8051F310/1/2/3/4/5
C8051F310/1/2/3/4/5
C8051F310/1/2/3/4/5
C8051F310/1/2/3/4/5
10-Bit Analog to Digital Converter
C8051F310/2
C8051F310/2
available on
available on
P3.1-3.4
P3.1-3.4
Sensor
Temp
Analog Multiplexer
VREF
GND
VDD
P1.0
P1.7
P2.0
P2.7
P3.0
P3.4
P1.0
P1.7
P2.0
P2.7
P3.0
P3.4
Figure 1.15. 10-Bit ADC Block Diagram
23-to-1
23-to-1
AMUX
AMUX
DD
) are available as ADC inputs. User firmware may shut down the
Rev. 1.7
Configuration, Control, and Data Registers
C8051F310/1/2/3/4/5/6/7
(+)
(-)
ADC
10-Bit
SAR
End of
Conversion
Interrupt
Conversion
Start
Window Compare
16
Logic
100
000
001
010
011
101
ADC Data
AD0BUSY (W)
Timer 0 Overflow
Timer 2 Overflow
Timer 1 Overflow
CNVSTR Input
Timer 3 Overflow
Registers
Window
Compare
Interrupt
33