C8051F301-GS Silicon Laboratories Inc, C8051F301-GS Datasheet - Page 57

IC 8051 MCU 8K FLASH 14-SOIC

C8051F301-GS

Manufacturer Part Number
C8051F301-GS
Description
IC 8051 MCU 8K FLASH 14-SOIC
Manufacturer
Silicon Laboratories Inc
Series
C8051F30xr
Datasheets

Specifications of C8051F301-GS

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C/SMBus/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
8
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F300DK
Minimum Operating Temperature
- 40 C
Package
14SOIC
Device Core
8051
Family Name
C8051F30x
Maximum Speed
25 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1444 - ADAPTER PROGRAM TOOLSTICK F300336-1319 - REFERENCE DESIGN STEPPER MOTOR
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1536-5
8.
The MCU system controller core is the CIP-51 microcontroller. The CIP-51 is fully compatible with the
MCS-51™ instruction set; standard 803x/805x assemblers and compilers can be used to develop soft-
ware. The MCU family has a superset of all the peripherals included with a standard 8051. Included are
three 16-bit counter/timers (see description in
in
tion
debug hardware (see description in
tems providing a complete data acquisition or control-system solution in a single integrated circuit.
The CIP-51 Microcontroller core implements the standard 8051 organization and peripherals as well as
additional custom peripherals and functions to extend its capability (see Figure 8.1 for a block diagram).
The CIP-51 includes the following features:
Section
8.2.6), and one byte-wide I/O Port (see description in
- Fully Compatible with MCS-51 Instruction Set
- 25 MIPS Peak Throughput with 25 MHz Clock
- 0 to 25 MHz Clock Frequency
- 256 Bytes of Internal RAM
- Byte-Wide I/O Port
CIP-51 Microcontroller
14), 256 bytes of internal RAM, 128 byte Special Function Register (SFR) address space
RESET
CLOCK
STOP
IDLE
ACCUMULATOR
PROGRAM COUNTER (PC)
Figure 8.1. CIP-51 Block Diagram
CONTROL
PSW
PRGM. ADDRESS REG.
LOGIC
POWER CONTROL
PC INCREMENTER
DATA POINTER
Section
REGISTER
BUFFER
TMP1
PIPELINE
17), and interfaces directly with the analog and digital subsys-
ALU
Section
TMP2
DATA BUS
DATA BUS
Rev. 2.9
D8
D8
D8
15), an enhanced full-duplex UART (see description
A16
D8
D8
D8
D8
B REGISTER
Section
- Reset Input
- Extended Interrupt Handler
- Power Management Modes
- On-chip Debug Logic
- Program and Data Memory Security
REGISTER
ADDRESS
INTERFACE
INTERFACE
INTERRUPT
INTERFACE
MEMORY
SRAM
SFR
BUS
C8051F300/1/2/3/4/5
12). The CIP-51 also includes on-chip
MEM_WRITE_DATA
SFR_WRITE_DATA
MEM_READ_DATA
STACK POINTER
(256 X 8)
SFR_READ_DATA
SRAM
MEM_CONTROL
EMULATION_IRQ
MEM_ADDRESS
SFR_ADDRESS
SFR_CONTROL
SYSTEM_IRQs
(Sec-
57

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