C8051F301-GS Silicon Laboratories Inc, C8051F301-GS Datasheet - Page 23
C8051F301-GS
Manufacturer Part Number
C8051F301-GS
Description
IC 8051 MCU 8K FLASH 14-SOIC
Manufacturer
Silicon Laboratories Inc
Series
C8051F30xr
Specifications of C8051F301-GS
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C/SMBus/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
8
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F300DK
Minimum Operating Temperature
- 40 C
Package
14SOIC
Device Core
8051
Family Name
C8051F30x
Maximum Speed
25 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1444 - ADAPTER PROGRAM TOOLSTICK F300336-1319 - REFERENCE DESIGN STEPPER MOTOR
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1536-5
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1.8.
C8051F300/1/2/3/4/5 devices include an on-chip voltage comparator that is enabled/disabled and config-
ured via user software. All Port I/O pins may be configurated as comparator inputs. Two comparator out-
puts may be routed to a Port pin if desired: a latched output and/or an unlatched (asynchronous) output.
Comparator response time is programmable, allowing the user to select between high-speed and low-
power modes. Positive and negative hysteresis is also configurable.
Comparator interrupts may be generated on rising, falling, or both edges. When in IDLE mode, these inter-
rupts may be used as a “wake-up” source. The comparator may also be configured as a reset source.
P0.0
P0.2
P0.4
P0.6
P0.1
P0.3
P0.5
P0.7
Comparator
Figure 1.11. Comparator Block Diagram
CP0 +
CP0 -
+
-
Rev. 2.9
GND
VDD
Decision
Reset
Tree
C8051F300/1/2/3/4/5
(SYNCHRONIZER)
D
CLR
SET
Q
Q
D
SET
CLR
Q
Q
Crossbar
Interrupt
Handler
23
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