C8051F305-GM Silicon Laboratories Inc, C8051F305-GM Datasheet - Page 52

IC 8051 MCU 2K FLASH 11QFN

C8051F305-GM

Manufacturer Part Number
C8051F305-GM
Description
IC 8051 MCU 2K FLASH 11QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F30xr
Datasheets

Specifications of C8051F305-GM

Program Memory Type
FLASH
Program Memory Size
2KB (2K x 8)
Package / Case
11-VQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C/SMBus/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
8
Number Of Timers
3
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F300DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
No. Of I/o's
8
Ram Memory Size
256Byte
Cpu Speed
25MHz
No. Of Timers
3
Rohs Compliant
Yes
Package
11QFN EP
Device Core
8051
Family Name
C8051F30x
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1444 - ADAPTER PROGRAM TOOLSTICK F300
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1251

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Quantity
Price
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C8051F300/1/2/3/4/5
The output of Comparator0 can be polled in software, used as an interrupt source, and/or routed to a Port
pin. When routed to a Port pin, the Comparator0 output is available asynchronous or synchronous to the
system clock; the asynchronous output is available even in STOP mode (with no system clock active).
When disabled, the Comparator0 output (if assigned to a Port I/O pin via the Crossbar) defaults to the logic
low state, and its supply current falls to less than 100 nA. See
Decoder” on page 104
Comparator0 inputs can be externally driven from –0.25 to (V
complete electrical specifications for Comparator0 are given in Table 7.1.
The Comparator0 response time may be configured in software via the CP0MD1-0 bits in register
CPT0MD (see SFR Definition 7.3). Selecting a longer response time reduces the amount of power con-
sumed by Comparator0. See Table 7.1 for complete timing and power consumption specifications.
The hysteresis of Comparator0 is software-programmable via its Comparator0 Control register (CPT0CN).
The user can program both the amount of hysteresis voltage (referred to the input voltage) and the positive
and negative-going symmetry of this hysteresis around the threshold voltage.
The Comparator0 hysteresis is programmed using Bits3–0 in the Comparator0 Control Register CPT0CN
(shown in SFR Definition 7.1). The amount of negative hysteresis voltage is determined by the settings of
the CP0HYN bits. As shown in Figure 7.2, settings of 20, 10 or 5 mV of negative hysteresis can be pro-
grammed, or negative hysteresis can be disabled. In a similar way, the amount of positive hysteresis is
determined by the setting the CP0HYP bits.
52
(Programmed with CP0HYP Bits)
Positive Hysteresis Voltage
INPUTS
OUTPUT
VIN+
VIN-
CIRCUIT CONFIGURATION
Positive Hysteresis
CP0-
CP0+
VIN+
VIN-
Disabled
V
for details on configuring the Comparator0 output via the digital Crossbar.
OL
Figure 7.2. Comparator Hysteresis Plot
V
OH
+
_
CP0
Positive Hysteresis
Maximum
OUT
Rev. 2.9
Negative Hysteresis
Disabled
DD
) + 0.25 V without damage or upset. The
Section “12.1. Priority Crossbar
Negative Hysteresis
(Programmed by CP0HYN Bits)
Maximum
Negative Hysteresis Voltage

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