ST72F324BK4T3 STMicroelectronics, ST72F324BK4T3 Datasheet - Page 169

• Manufacturer Part Number: ST72F324BK4T3
• Description: IC MCU 8BIT 16K FLASH 32-TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324BK4T3

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-TQFP, 32-VQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• A/d Bit Size: 10 bit
• A/d Channels Available: 12
• Height: 1.4 mm
• Length: 7 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3.8 V
• Width: 7 mm
• For Use With: 497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-8241; ST72F324BK4T3

ST72324B-Auto
12.12
12.12.1
Table 110. SPI characteristics
1. Data based on design simulation and/or characterization results, not tested in production.
2. Depends on f
t
t
w(SCKH)
t
w(SCKL)
1/t
t
Symbol
t
t
t
t
t
dis(SO)
t
t
t
su(SS)
t
t
su(MI)
v(MO)
h(MO)
h(SS)
su(SI)
a(SO)
v(SO)
h(SO)
t
t
h(MI)
h(SI)
r(SCK)
f(SCK)
f
c(SCK)
SCK
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
SPI clock frequency
SPI clock rise and fall time
SS setup time
SS hold time
SCK high and low time
Data input setup time
Data input hold time
Data output access time
Data output disable time
Data output valid time
Data output hold time
Data output valid time
Data output hold time
Communication interface characteristics
Serial peripheral interface (SPI)
The following characteristics are ubject to general operating conditions for V
unless otherwise specified. The data is based on design simulation and/or characterization
results, not tested in production.
When no communication is on-going the data output line of the SPI (MOSI in master mode,
MISO in slave mode) has its alternate function capability released. In this case, the pin
status depends on the I/O port configuration. Refer to the I/O port characteristics for more
details on the input/output alternate function characteristics (SS, SCK, MOSI, MISO).
CPU
. For example, if f
Parameter
(2)
CPU
= 8 MHz, then t
Master f
Slave f
Slave
Slave
Master
Slave
Master
Slave
Master
Slave
Slave
Slave
Slave (after enable edge)
Master (after enable edge)
CPU
Conditions
Doc ID13466 Rev 4
CPU
= 8 MHz
CPU
= 8 MHz
= 1 / f
CPU
= 125ns and t
f
CPU
/128 = 0.0625
t
CPU
Min
120
100
100
100
100
100
90
0
0
0
0
su(SS)
see I/O port pin description
+ 50
= 175ns.
Electrical characteristics
f
f
CPU
CPU
Max
120
240
120
120
DD
/4 = 2
/2 = 4
, f
CPU
, and T
169/198
Unit
MHz
ns
A