ST72F324BK4T3 STMicroelectronics, ST72F324BK4T3 Datasheet - Page 166
ST72F324BK4T3
Manufacturer Part Number
ST72F324BK4T3
Description
IC MCU 8BIT 16K FLASH 32-TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F324BJ2T6.pdf
(198 pages)
Specifications of ST72F324BK4T3
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
A/d Bit Size
10 bit
A/d Channels Available
12
Height
1.4 mm
Length
7 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3.8 V
Width
7 mm
For Use With
497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-8241
ST72F324BK4T3
ST72F324BK4T3
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST72F324BK4T3
Manufacturer:
STMicroelectronics
Quantity:
10 000
Company:
Part Number:
ST72F324BK4T3TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
Electrical characteristics
12.10
12.10.1
Table 107. Asynchronous RESET pin
1. Data based on characterization results, not tested in production.
2. Hysteresis voltage between Schmitt trigger switching levels.
3. The I
4. Data guaranteed by design, not tested in production.
5. To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on the
6. The reset network (the resistor and two capacitors) protects the device against parasitic resets, especially in noisy
166/198
t
w(RSTL)out
t
t
Symbol
h(RSTL)in
g(RSTL)in
ports and control pins) must not exceed I
RESET pin with a duration below t
environments.
V
R
V
V
V
I
hys
IO
ON
OL
IH
IL
IO
current sunk must always respect the absolute maximum rating specified in
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
Output low level voltage
Driving current on RESET pin
Weak pull-up equivalent resistor
Generated reset pulse duration
External reset pulse hold time
Filtered glitch duration
Control pin characteristics
Asynchronous RESET pin
Subject to general operating conditions for V
Parameter
h(RSTL)in
(1)
(6)
(1)
(3)
VSS
can be ignored.
(5)
.
(2)
Doc ID13466 Rev 4
V
V
Internal reset sources
DD
DD
= 5V, I
= 5V
Conditions
IO
DD
= +2mA
, f
CPU
, and T
Section 12.2.2
0.7xV
A
Min
2.5
20
20
unless otherwise specified.
DD
Typ
200
and the sum of I
2.5
0.2
30
30
2
ST72324B-Auto
0.3xV
42
Max
120
0.5
(4)
DD
IO
(I/O
Unit
mA
k
µs
µs
ns
V
V