LPC2378FBD144,551 NXP Semiconductors, LPC2378FBD144,551 Datasheet - Page 33

IC ARM7 MCU FLASH 512K 144LQFP

LPC2378FBD144,551

Manufacturer Part Number
LPC2378FBD144,551
Description
IC ARM7 MCU FLASH 512K 144LQFP
Manufacturer
NXP Semiconductors
Series
LPC2300r
Datasheet

Specifications of LPC2378FBD144,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
144-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
104
Ram Size
58K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC23
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
58 KB
Interface Type
CAN/I2S/ISP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
104
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, KSDKLPC2378-02, MCB2370, MCB2370U, MCB2370UME
Development Tools By Supplier
OM10094
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4310 - EVAL BOARD LPC2158 W/LCDMCB2370UME - BOARD EVAL MCB2370 + ULINK-MEMCB2370U - BOARD EVAL MCB2370 + ULINK2MCB2370 - BOARD EVAL NXP LPC2368/2378568-3999 - BOARD EVAL FOR LPC23 ARM MCU622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-3998
935282458551
LPC2378FBD144-S

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NXP Semiconductors
LPC2377_78
Product data sheet
7.25.4.1 Idle mode
7.25.4.2 Sleep mode
7.25.4 Power control
sufficient amplitude to drive the clock logic. The amount of time depends on many factors,
including the rate of V
electrical characteristics (if a quartz crystal is used), as well as any other external circuitry
(e.g., capacitors), and the characteristics of the oscillator itself under the existing ambient
conditions.
The LPC2377/78 support a variety of power control features. There are four special
modes of processor power reduction: Idle mode, Sleep mode, Power-down mode, and
Deep power-down mode. The CPU clock rate may also be controlled as needed by
changing clock sources, reconfiguring PLL values, and/or altering the CPU clock divider
value. This allows a trade-off of power versus processing speed based on application
requirements. In addition, Peripheral Power Control allows shutting down the clocks to
individual on-chip peripherals, allowing fine tuning of power consumption by eliminating all
dynamic power use in any peripherals that are not required for the application. Each of the
peripherals has its own clock divider which provides even better power control.
The LPC2377/78 also implement a separate power domain in order to allow turning off
power to the bulk of the device while maintaining operation of the RTC and a small SRAM,
referred to as the battery RAM.
In Idle mode, execution of instructions is suspended until either a Reset or interrupt
occurs. Peripheral functions continue operation during Idle mode and may generate
interrupts to cause the processor to resume execution. Idle mode eliminates dynamic
power used by the processor itself, memory systems and related controllers, and internal
buses.
In Sleep mode, the oscillator is shut down and the chip receives no internal clocks. The
processor state and registers, peripheral registers, and internal SRAM values are
preserved throughout Sleep mode and the logic levels of chip pins remain static. The
output of the IRC is disabled but the IRC is not powered down for a fast wake-up later. The
32 kHz RTC oscillator is not stopped because the RTC interrupts may be used as the
wake-up source. The PLL is automatically turned off and disconnected. The CCLK and
USB clock dividers automatically get reset to zero.
The Sleep mode can be terminated and normal operation resumed by either a Reset or
certain specific interrupts that are able to function without clocks. Since all dynamic
operation of the chip is suspended, Sleep mode reduces chip power consumption to a
very low value. The flash memory is left on in Sleep mode, allowing a very quick wake-up.
On the wake-up of Sleep mode, if the IRC was used before entering Sleep mode, the
code execution and peripherals activities will resume after 4 cycles expire. If the main
external oscillator was used, the code execution will resume when 4096 cycles expire.
The customers need to reconfigure the PLL and clock dividers accordingly.
All information provided in this document is subject to legal disclaimers.
DD(3V3)
Rev. 5 — 17 June 2010
ramp (in the case of power on), the type of crystal and its
Single-chip 16-bit/32-bit microcontrollers
LPC2377/78
© NXP B.V. 2010. All rights reserved.
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