LPC1343FBD48,151 NXP Semiconductors, LPC1343FBD48,151 Datasheet - Page 321

• Manufacturer Part Number: LPC1343FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1343FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 40
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 42
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
• Development Tools By Supplier: OM11039, OM11040, OM11046, OM11048
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4945; 935289652151

NXP Semiconductors
Table 222. I2C0CONSET and I2C1CONSET used to
Table 223. I2C0CONSET and I2C1CONSET used to
Table 224. Abbreviations used to describe an I
Table 225. I2CONSET used to initialize Master Transmitter
Table 226. Master Transmitter mode. . . . . . . . . . . . . . . .212
Table 227. Master Receiver mode. . . . . . . . . . . . . . . . . .215
Table 228. I2C0ADR and I2C1ADR usage in Slave Receiver
Table 229. I2C0CONSET and I2C1CONSET used to
Table 230. Slave Receiver mode . . . . . . . . . . . . . . . . . .218
Table 231. Slave Transmitter mode. . . . . . . . . . . . . . . . .222
Table 232. Miscellaneous States . . . . . . . . . . . . . . . . . . .224
Table 233. SSP pin descriptions . . . . . . . . . . . . . . . . . . .236
Table 234. Register overview: SSP (base address 0x4004
Table 235: SSP0 Control Register 0 (SSP0CR0 - address
Table 236: SSP0 Control Register 1 (SSP0CR1 - address
Table 237: SSP0 Data Register (SSP0DR - address
Table 238: SSP0 Status Register (SSP0SR - address
Table 239: SSP0 Clock Prescale Register (SSP0CPSR -
Table 240: SSP0 Interrupt Mask Set/Clear register
Table 241: SSP0 Raw Interrupt Status register (SSP0RIS -
Table 242: SSP0 Masked Interrupt Status register (SSP0MIS
Table 243: SSP0 interrupt Clear Register (SSP0ICR -
Table 244. Counter/timer pin description . . . . . . . . . . . . .251
Table 245. Register overview: 16-bit counter/timer 0 CT16B0
Table 246. Register overview: 16-bit counter/timer 1 CT16B1
Table 247. Interrupt Register (TMR16B0IR - address
Table 248. Timer Control Register (TMR16B0TCR - address
Table 249. Match Control Register (TMR16B0MCR -
Table 250. Capture Control Register (TMR16B0CCR -
Table 251. External Match Register (TMR16B0EMR -
UM10375
User manual
configure Master mode . . . . . . . . . . . . . . . . . .203
configure Slave mode . . . . . . . . . . . . . . . . . . .204
operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . .210
mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .210
mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .217
initialize Slave Receiver mode . . . . . . . . . . . .217
0000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .237
0x4004 0000) bit description . . . . . . . . . . . . .238
0x4004 0004) bit description . . . . . . . . . . . . .239
0x4004 0008) bit description . . . . . . . . . . . . .239
0x4004 000C bit description . . . . . . . . . . . . . .240
address 0x4004 0010) bit description. . . . . . .240
(SSP0IMSC - address 0x4004 0014) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .241
address 0x4004 0018) bit description. . . . . . .241
-address 0x4004 001C) bit description . . . . . .242
address 0x4004 0020) bit description. . . . . . .242
(base address 0x4000 C000) . . . . . . . . . . . .252
(base address 0x4001 0000) . . . . . . . . . . . .253
0x4000 C000 and TMR16B1IR - address
0x4001 0000) bit description . . . . . . . . . . . . .254
0x4000 C004 and TMR16B1TCR - address
0x4001 0004) bit description . . . . . . . . . . . . .254
address 0x4000 C014 and TMR16B1MCR -
address 0x4001 0014) bit description . . . . . .255
address 0x4000 C028 and TMR16B1CCR -
address 0x4001 0028) bit description. . . . . . .256
address 0x4000 C03C and TMR16B1EMR -
All information provided in this document is subject to legal disclaimers.
2
C
Rev. 2 — 7 July 2010
Table 252. External match control . . . . . . . . . . . . . . . . . 257
Table 253. Count Control Register (TMR16B0CTCR -
Table 254. PWM Control Register (TMR16B0PWMC -
Table 255. Counter/timer pin description . . . . . . . . . . . . 263
Table 256. Register overview: 32-bit counter/timer 0 CT32B0
Table 257. Register overview: 32-bit counter/timer 1 CT32B1
Table 258: Interrupt Register (TMR32B0IR - address
Table 259: Timer Control Register (TMR32B0TCR - address
Table 260: Match Control Register (TMR32B0MCR -
Table 261: Capture Control Register (TMR32B0CCR -
Table 262: External Match Register (TMR32B0EMR -
Table 263. External match control . . . . . . . . . . . . . . . . . 269
Table 264: Count Control Register (TMR32B0CTCR -
Table 265: PWM Control Register (TMR32B0PWMC -
Table 266. Register overview: system tick timer (base
Table 267. System Timer Control and status register (CTRL
Table 268. System Timer Reload value register (LOAD -
Table 269. System Timer Current value register (VAL -
Table 270. System Timer Calibration value register (CALIB -
Table 271. Register overview: Watchdog timer (base
Table 272. Watchdog Mode register (WDMOD - address
Table 273. Watchdog operating modes selection . . . . . . 282
Table 274. Watchdog Constant register (WDTC - address
Table 275. Watchdog Feed register (WDFEED - address
Table 276. Watchdog Timer Value register (WDTV - address
Table 277. ADC pin description . . . . . . . . . . . . . . . . . . . 284
Table 278. Register overview: ADC (base address 0x4001
Chapter 21: LPC13xx Supplementary information
address 0x4001 003C) bit description . . . . . . 257
address 0x4000 C070 and TMR16B1CTCR -
address 0x4001 0070) bit description . . . . . . 258
address 0x4000 C074 and TMR16B1PWMC-
address 0x4001 0074) bit description . . . . . . 259
(base address 0x4001 4000) . . . . . . . . . . . . 264
(base address 0x4001 8000) . . . . . . . . . . . . 265
0x4001 4000 and TMR32B1IR - address
0x4001 8000) bit description . . . . . . . . . . . . . 266
0x4001 4004 and TMR32B1TCR - address
0x4001 8004) bit description . . . . . . . . . . . . . 266
address 0x4001 4014 and TMR32B1MCR -
address 0x4001 8014) bit description . . . . . . 267
address 0x4001 4028 and TMR32B1CCR -
address 0x4001 8028) bit description . . . . . . 268
address 0x4001 403C and TMR32B1EMR -
address0x4001 803C) bit description . . . . . . 269
address 0x4001 4070 and TMR32B1TCR -
address 0x4001 8070) bit description . . . . . 270
0x4001 4074 and TMR32B1PWMC - 0x4001
8074) bit description. . . . . . . . . . . . . . . . . . . . 271
address 0xE000 E000) . . . . . . . . . . . . . . . . . 275
- 0xE000 E010) bit description. . . . . . . . . . . . 276
0xE000 E014) bit description . . . . . . . . . . . . . 276
0xE000 E018) bit description . . . . . . . . . . . . . 277
0xE000 E01C) bit description . . . . . . . . . . . . 277
address 0x4000 4000) . . . . . . . . . . . . . . . . . . 281
0x4000 4000) bit description . . . . . . . . . . . . . 281
0x4000 4004) bit description . . . . . . . . . . . . . 282
0x4000 4008) bit description . . . . . . . . . . . . . 282
0x4000 000C) bit description . . . . . . . . . . . . . 283
UM10375
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