LPC1343FBD48,151 NXP Semiconductors, LPC1343FBD48,151 Datasheet - Page 311

• Manufacturer Part Number: LPC1343FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1343FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 40
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 42
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
• Development Tools By Supplier: OM11039, OM11040, OM11046, OM11048
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4945; 935289652151

NXP Semiconductors
19.15 Debug notes
UM10375
User manual
19.14.10 IAP Status Codes
19.15.1 Comparing flash images
19.15.2 Serial Wire Debug (SWD) flash programming interface
Table 318. IAP Status Codes Summary
Depending on the debugger used and the IDE debug settings, the memory that is visible
when the debugger connects might be the boot ROM, the internal SRAM, or the flash. To
help determine which memory is present in the current debug environment, check the
value contained at flash address 0x0000 0004. This address contains the entry point to
the code in the ARM Cortex-M3 vector table, which is the bottom of the boot ROM, the
internal SRAM, or the flash memory respectively.
Table 319. Memory mapping in debug mode
Debug tools can write parts of the flash image to RAM and then execute the IAP call
"Copy RAM to flash" repeatedly with proper offset.
Status
Code
0
1
2
3
4
5
6
7
8
9
10
11
Memory mapping mode
Bootloader mode
User flash mode
User SRAM mode
Mnemonic
CMD_SUCCESS
INVALID_COMMAND
SRC_ADDR_ERROR
DST_ADDR_ERROR
SRC_ADDR_NOT_MAPPED
DST_ADDR_NOT_MAPPED
COUNT_ERROR
INVALID_SECTOR
SECTOR_NOT_BLANK
SECTOR_NOT_PREPARED_
FOR_WRITE_OPERATION
COMPARE_ERROR
BUSY
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 July 2010
Chapter 19: LPC13xx Flash memory programming firmware
Description
Command is executed successfully.
Invalid command.
Source address is not on a word boundary.
Destination address is not on a correct boundary.
Source address is not mapped in the memory map.
Count value is taken in to consideration where
applicable.
Destination address is not mapped in the memory
map. Count value is taken in to consideration where
applicable.
Byte count is not multiple of 4 or is not a permitted
value.
Sector number is invalid.
Sector is not blank.
Command to prepare sector for write operation was
not executed.
Source and destination data is not same.
flash programming hardware interface is busy.
Memory start address visible at 0x0000 0004
0x1FFF 0000
0x0000 0000
0x1000 0000
UM10375
© NXP B.V. 2010. All rights reserved.
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