DSPIC30F6010-30I/PF Microchip Technology, DSPIC30F6010-30I/PF Datasheet - Page 24

• Manufacturer Part Number: DSPIC30F6010-30I/PF
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 144KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F601030IPF

dsPIC30F6010
39. Module: CAN
40. Module: Flash Memory
EXAMPLE 17:
DS80459D-page 24
__AddressError:
CAN Receive filters 3, 4 and 5 may not work for a
given combination of instruction cycle speed and
CAN bit time quanta.
Work around
Do not use CAN RX filters 3, 4 and 5. Instead, use
filters 0, 1 and 2.
Affected Silicon Revisions
If a device Reset occurs while an RTSP operation
is ongoing, code execution after the reset may
lead to an Address Error Trap.
Work around
The user should define an Address Error Trap
service routine as shown in Example 17 in order to
allow normal code execution to continue.
Affected Silicon Revisions
bclr
bclr
reset
B1
B1
X
X
B2
B2
X
RCON, #TRAPR
INTCON1, #ADDRERR
;Clear the Trap
;Reset Flag Bit
;Address Error
;trap flag bit
;Software reset
;Clear the
41. Module: Interrupt Controller
EXAMPLE 18:
EXAMPLE 19:
mov
mov
disi #2
mov
mov
asm volatile(
//Note: There are no commas between
//
//
A specific write sequence for Interrupt Priority
Control 2 (IPC2) SFR is required to prevent
possible data corruption in the Interrupt Enable
Control 2 (IEC2) SFR. Interrupts must be disabled
during this IPC2 SFR write sequence.
Work around
An example of this write sequence is shown in
Example 18.
When coding in C, the write sequence shown
above can be implemented using inline assembly
instructions. The equivalent write sequence using
the C30 compiler is shown in Example 19.
Affected Silicon Revisions
B1
#IPC2, w0
#0x4444, w1
w1, IPC2
#IPC2, w0
X
the quoted strings in the code
segment above.
B2
“mov.d w0, [w15++]\n\t”
“mov
“mov
“disi
“mov
“mov
“mov.d [--w15], w0”);
;Point w0 to IPC2
;Write data to go to IPC2
;Disable interrupts for
;next two cycles
;Write the data to IPC2
;Target w1 to keep IPC2
;address on bus
© 2010 Microchip Technology Inc.
#IPC2,w0\n\t”
#0x4444,w1\n\t”
#2\n\t”
w1, IPC2\n\t”
#IPC2, w0\n\t”