ATMEGA128L-8AU Atmel, ATMEGA128L-8AU Datasheet - Page 114

IC AVR MCU 128K 8MHZ 3V 64TQFP

ATMEGA128L-8AU

Manufacturer Part Number
ATMEGA128L-8AU
Description
IC AVR MCU 128K 8MHZ 3V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128L-8AU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
2-Wire/JTAG/USART
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
8 MIPS
Eeprom Memory
4K Bytes
Input Output
53
Interface
2-Wire/JTAG/SPI/USART
Memory Type
Flash
Number Of Bits
8
Programmable Memory
128K Bytes
Timers
2-8-bit, 2-16-bit
Voltage, Range
4.5-5.5 V
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
4096Byte
Ram Memory Size
4KB
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Reusing the Temporary High
Byte Register
114
ATmega128
The following code examples show how to do an atomic write of the TCNTn Register
contents. Writing any of the OCRnA/B/C or ICRn Registers can be done by using the
same principle.
Note:
The assembly code example requires that the r17:r16 register pair contains the value to
be written to TCNTn.
If writing to more than one 16-bit register where the high byte is the same for all registers
written, then the high byte only needs to be written once. However, note that the same
rule of atomic operation described previously also applies in this case.
Assembly Code Example
C Code Example
TIM16_WriteTCNTn:
void TIM16_WriteTCNTn( unsigned int i )
{
}
; Save global interrupt flag
in r18,SREG
; Disable interrupts
cli
; Set TCNTn to r17:r16
out TCNTnH,r17
out TCNTnL,r16
; Restore global interrupt flag
out SREG,r18
ret
unsigned char sreg;
unsigned int i;
/* Save global interrupt flag */
sreg = SREG;
/* Disable interrupts */
__disable_interrupt();
/* Set TCNTn to i */
TCNTn = i;
/* Restore global interrupt flag */
SREG = sreg;
1. The example code assumes that the part specific header file is included.
For I/O registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and
“SBI” instructions must be replaced with instructions that allow access to extended
I/O. Typically “LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
(1)
(1)
2467M–AVR–11/04

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