ATMEGA1281V-8MU Atmel, ATMEGA1281V-8MU Datasheet - Page 276

• Manufacturer Part Number: ATMEGA1281V-8MU
• Description: IC MCU AVR 128K FLASH 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA1281V-8MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 6
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATAVRDB101 - MODULE DISPLAY LCD/RGB BACKLIGHT770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 25-1. Analog to Digital Converter Block Schematic
25.2
2549M–AVR–09/10
ADC[15:0]
BANDGAP (1.1V)
REFERENCE
REFERENCE
(1.1V/2.56V)
INTERNAL
AVCC
AREF
GND
8-BIT DATABUS
Operation
ADC[2:0]
ADC[10:8]
ADC MULTIPLEXER
SELECT (ADMUX)
The ADC converts an analog input voltage to a 10-bit digital value through successive approxi-
mation. The minimum value represents GND and the maximum value represents the voltage on
the AREF pin minus 1 LSB. Optionally, AVCC or an internal 1.1V or 2.56V reference voltage
may be connected to the AREF pin by writing to the REFSn bits in the ADMUX Register. The
internal voltage reference may thus be decoupled by an external capacitor at the AREF pin to
improve noise immunity.
The analog input channel is selected by writing to the MUX bits in ADMUX and ADCSRB. Any of
the ADC input pins, as well as GND and a fixed bandgap voltage reference, can be selected as
single ended inputs to the ADC. A selection of ADC input pins can be selected as positive and
negative inputs to the differential amplifier.
MUX DECODER
+
-
REGISTER B (ADCSRB)
ADC CTRL & STATUS
AMPLIFIE R
GAIN
ATmega640/1280/1281/2560/2561
10-bit DAC
REGISTER A (ADCSRA)
ADC CTRL & STATUS
ADC CONVERSION
COMPLETE IRQ
PRESCALER
CONVERSION LOGIC
+
-
ADTS[2:0]
START
TRIGGER
SELECT
SAMPLE & HOLD
INTERRUPT
COMPARATOR
ADC
MULTIPLEXER
OUTPUT
FLAGS
15
ADC DATA REGISTER
(ADCH/ADCL)
0
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