PIC18F4585-I/ML Microchip Technology, PIC18F4585-I/ML Datasheet - Page 56

IC MCU FLASH 24KX16 44QFN

PIC18F4585-I/ML

Manufacturer Part Number
PIC18F4585-I/ML
Description
IC MCU FLASH 24KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4585-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
3.25 KB
On-chip Adc
11 bit
Number Of Programmable I/os
44
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Mounting Style
SMD/SMT
Height
0.88 mm
Interface Type
I2C, SPI, EUSART
Length
8 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
8 mm
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4680 - BOARD DAUGHTER ICEPIC3444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2585/2680/4585/4680
TABLE 4-4:
DS39625C-page 54
TXB0D5
TXB0D4
TXB0D3
TXB0D2
TXB0D1
TXB0D0
TXB0DLC
TXB0EIDL
TXB0EIDH
TXB0SIDL
TXB0SIDH
TXB0CON
TXB1D7
TXB1D6
TXB1D5
TXB1D4
TXB1D3
TXB1D2
TXB1D1
TXB1D0
TXB1DLC
TXB1EIDL
TXB1EIDH
TXB1SIDL
TXB1SIDH
TXB1CON
TXB2D7
TXB2D6
TXB2D5
TXB2D4
TXB2D3
TXB2D2
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1:
Register
2:
3:
4:
5:
6:
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
See Table 4-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read ‘0’.
This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
2585 2680 4585 4680
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Applicable Devices
Brown-out Reset
Power-on Reset,
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
-x-- xxxx
xxxx xxxx
xxxx xxxx
xxx- x-xx
xxxx xxxx
0000 0-00
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
-x-- xxxx
xxxx xxxx
xxxx xxxx
xxx- x-xx
xxxx xxxx
0000 0-00
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
Preliminary
RESET Instruction,
MCLR Resets,
Stack Resets
WDT Reset,
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-u-- uuuu
uuuu uuuu
uuuu uuuu
uuu- u-uu
uuuu uuuu
0000 0-00
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-u-- uuuu
uuuu uuuu
uuuu uuuu
uuu- u-uu
uuuu uuuu
0000 0-00
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
© 2007 Microchip Technology Inc.
Wake-up via WDT
or Interrupt
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-u-- uuuu
uuuu uuuu
-uuu uuuu
uuu- u-uu
uuuu uuuu
uuuu u-uu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-u-- uuuu
uuuu uuuu
uuuu uuuu
uuu- uu-u
-uuu uuuu
uuuu u-uu
0uuu uuuu
0uuu uuuu
0uuu uuuu
0uuu uuuu
0uuu uuuu
0uuu uuuu

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