PIC18F4585-I/ML Microchip Technology, PIC18F4585-I/ML Datasheet - Page 181

• Manufacturer Part Number: PIC18F4585-I/ML
• Description: IC MCU FLASH 24KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4585-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Core: PIC
• Processor Series: PIC18F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Data Ram Size: 3.25 KB
• On-chip Adc: 11 bit
• Number Of Programmable I/os: 44
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 4.2 V to 5.5 V
• Mounting Style: SMD/SMT
• Height: 0.88 mm
• Interface Type: I2C, SPI, EUSART
• Length: 8 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.2 V
• Width: 8 mm
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4680 - BOARD DAUGHTER ICEPIC3444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.4.5
In Full-Bridge Output mode, four pins are used as
outputs; however, only two outputs are active at a time.
In the Forward mode, pin P1A is continuously active
and pin P1D is modulated. In the Reverse mode, pin
P1C is continuously active and pin P1B is modulated.
These are illustrated in Figure 16-6.
FIGURE 16-6:
© 2007 Microchip Technology Inc.
Forward Mode
Reverse Mode
Note 1: At this time, the TMR2 register is equal to the PR2 register.
Note
FULL-BRIDGE MODE
2: Output signal is shown as active-high.
P1A
P1B
P1C
P1D
P1A
P1B
P1C
P1D
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
FULL-BRIDGE PWM OUTPUT
(1)
(1)
Duty Cycle
Duty Cycle
PIC18F2585/2680/4585/4680
Preliminary
Period
Period
P1A, P1B, P1C and P1D outputs are multiplexed with
the
PORTD<7> data latches. The TRISD<4>, TRISD<5>,
TRISD<6> and TRISD<7> bits must be cleared to
make the P1A, P1B, P1C and P1D pins outputs.
PORTD<4>,
(1)
(1)
PORTD<5>,
DS39625C-page 179
PORTD<6>
and