PIC18F4585-I/ML Microchip Technology, PIC18F4585-I/ML Datasheet - Page 260

IC MCU FLASH 24KX16 44QFN

PIC18F4585-I/ML

Manufacturer Part Number
PIC18F4585-I/ML
Description
IC MCU FLASH 24KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4585-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
3.25 KB
On-chip Adc
11 bit
Number Of Programmable I/os
44
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Mounting Style
SMD/SMT
Height
0.88 mm
Interface Type
I2C, SPI, EUSART
Length
8 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
8 mm
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4680 - BOARD DAUGHTER ICEPIC3444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2585/2680/4585/4680
20.1
There are eight modes of operation for the compara-
tors, shown in Figure 20-1. Bits CM2:CM0 of the
CMCON register are used to select these modes. The
TRISA register controls the data direction of the com-
parator pins for each mode. If the Comparator mode is
FIGURE 20-1:
DS39625C-page 258
Comparators Reset (POR Default Value)
CM2:CM0 = 000
Two Independent Comparators
CM2:CM0 = 010
Two Common Reference Comparators
CM2:CM0 = 100
One Independent Comparator with Output
CM2:CM0 = 001
RD1/PSP1/C1IN-
RD0/PSP0/C1IN+
RD3/PSP3/C2IN-
RD2/PSP2/C2IN+
RD1/PSP1/C1IN-
RD0/PSP0/C1IN+
RD3/PSP3/C2IN-
RD2/PSP2/C2IN+
A = Analog Input, port reads zeros always
* Setting the TRISA<5:4> bits will disable the comparator outputs by configuring the pins as inputs.
RD1/PSP1/C1IN-
RD0/PSP0/C1IN+
RD3/PSP3/C2IN-
RD2/PSP2/C2IN+
RD1/PSP1/C1IN-
RD0/PSP0/C1IN+
RE1/WR/AN6/C1OUT*
RD3/PSP3/C2IN-
RD2/PSP2/C2IN+
Comparator Configuration
A
A
A
D
A
A
A
A
A
A
A
A
COMPARATOR I/O OPERATING MODES
A
A
D
D
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
-
+
-
+
IN
IN
IN
IN
-
+
-
+
-
+
-
+
-
+
-
+
C1
C2
C1
C2
C1
C2
C1
C2
C1OUT
C2OUT
D = Digital Input
Off
Off
(Read as ‘0’)
C1OUT
C2OUT
(Read as ‘0’)
C1OUT
Off
(Read as ‘0’)
Preliminary
Two Common Reference Comparators with Outputs
CM2:CM0 = 101
Two Independent Comparators with Outputs
CM2:CM0 = 011
Comparators Off
CM2:CM0 = 111
Four Inputs Multiplexed to Two Comparators
CM2:CM0 = 110
RD1/PSP1/
C1IN-
RD0/PSP0/
C1IN+
RD3/PSP3/
C2IN-
RD2/PSP2/
C2IN+
RD1/PSP1/C1IN-
RD0/PSP0/C1IN+
RD3/PSP3/C2IN-
RD2/PSP2/C2IN+
RD1/PSP1/C1IN-
RD0/PSP0/C1IN+
RE1/WR/AN6/C1OUT*
RD3/PSP3/C2IN-
RD2/PSP2/C2IN+
RE2/CS/AN7/C2OUT*
RD1/PSP1/C1IN-
RD0/PSP0/C1IN+
RE1/WR/AN6/C1OUT*
RD3/PSP3/C2IN-
RD2/PSP2/C2IN+
RE2/CS/AN7/C2OUT*
changed, the comparator output level may not be valid
for the specified mode change delay shown in
Section 27.0 “Electrical Characteristics”.
Note:
CIS (CMCON<3>) is the Comparator Input Switch
A
A
A
A
Comparator interrupts should be disabled
during a Comparator mode change;
otherwise, a false interrupt may occur.
CIS = 0
CIS = 1
CIS = 0
CIS = 1
A
A
A
D
A
A
A
A
D
D
D
D
© 2007 Microchip Technology Inc.
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
-
+
-
+
-
+
-
+
V
V
V
V
-
+
-
+
IN
IN
IN
IN
CV
-
+
-
+
C1
C2
C1
C2
C1
C2
REF
C1
C2
From V
C1OUT
C2OUT
C1OUT
C2OUT
Off
(Read as ‘0’)
Off
(Read as ‘0’)
REF
C1OUT
C2OUT
Module

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