PIC18F442-I/L Microchip Technology, PIC18F442-I/L Datasheet - Page 283

• Manufacturer Part Number: PIC18F442-I/L
• Description: IC MCU FLASH 8KX16 EE A/D 44PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F442-I/L

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Controller Family/series: PIC18
• No. Of I/o's: 34
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: MSSP, SPI, I2C, PSP, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Package: 44PLCC
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164309 - MODULE SKT FOR PM3 44PLCCXLT44L2 - SOCKET TRAN ICE 44PLCC444-1001 - DEMO BOARD FOR PICMICRO MCUDVA16XL441 - ADAPTER DEVICE ICE 44PLCCDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F442I/L

FIGURE 22-15:
TABLE 22-14: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
© 2006 Microchip Technology Inc.
70
71
71A
72
72A
73A
74
75
76
77
78
79
80
82
83
Note 1: Requires the use of Parameter # 73A.
Param. No.
Note:
(CKP = 0)
(CKP = 1)
SDI
SCK
SDO
SS
SCK
2: Only if Parameter # 71A and # 72A are used.
Refer to Figure 22-4 for load conditions.
TssL2scH,
TssL2scL
TscH
TscL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ SS to SDO output hi-impedance
TscR
TscF
TscH2doV,
TscL2doV
TssL2doV
TscH2ssH,
TscL2ssH
B
Symbol
2
B
82
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
70
SS to SCK or SCK input
SCK input high time
(Slave mode)
SCK input low time
(Slave mode)
Last clock edge of Byte1 to the first clock edge of Byte2 1.5 T
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SCK output rise time (Master mode)
SCK output fall time (Master mode)
SDO data output valid after SCK
edge
SDO data output valid after SS edge PIC18FXXX
SS
MSb In
MSb
after SCK edge
74
71
75, 76
72
Characteristic
bit6 - - - - - -1
bit6 - - - -1
80
Continuous
Single Byte
Continuous
Single Byte
PIC18FXXX
PIC18LFXXX
PIC18FXXX
PIC18LFXXX
PIC18FXXX
PIC18LFXXX
PIC18FXXX
PIC18LFXXX
PIC18FXXX
PIC18LFXXX
PIC18LFXXX
LSb
LSb In
1.25 T
1.25 T
1.5 T
Min
T
100
40
40
CY
10
CY
—
—
—
—
—
—
—
—
—
—
—
—
CY
CY
CY
83
+ 40
+ 40
+ 30
+ 30
PIC18FXX2
77
Max Units Conditions
150
150
25
60
25
60
50
25
60
25
60
50
50
—
—
—
—
—
—
—
—
DS39564C-page 281
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
= 2V
= 2V
= 2V
= 2V
= 2V
= 2V