PIC18F442-I/L Microchip Technology, PIC18F442-I/L Datasheet - Page 248

• Manufacturer Part Number: PIC18F442-I/L
• Description: IC MCU FLASH 8KX16 EE A/D 44PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F442-I/L

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Controller Family/series: PIC18
• No. Of I/o's: 34
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: MSSP, SPI, I2C, PSP, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Package: 44PLCC
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164309 - MODULE SKT FOR PM3 44PLCCXLT44L2 - SOCKET TRAN ICE 44PLCC444-1001 - DEMO BOARD FOR PICMICRO MCUDVA16XL441 - ADAPTER DEVICE ICE 44PLCCDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F442I/L

PIC18FXX2
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
† If WDT causes wake-up, this bit is cleared.
DS39564C-page 246
Q Cycle Activity:
Before Instruction
After Instruction
Decode
TO =
PD =
TO =
PD =
Q1
?
?
1 †
0
operation
Enter SLEEP mode
[ label ] SLEEP
None
00h
0
1
0
TO, PD
The power-down status bit (PD) is
cleared. The time-out status bit
(TO) is set. Watchdog Timer and
its postscaler are cleared.
The processor is put into SLEEP
mode with the oscillator stopped.
1
1
SLEEP
No
Q2
0000
WDT postscaler,
TO,
PD
WDT,
0000
Process
Data
Q3
0000
Go to
sleep
Q4
0011
SUBFWB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
Example 3:
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
register 'f'
(W) – (f) – (C)
N, OV, C, DC, Z
Subtract f from W with borrow
[ label ] SUBFWB
0
d
a
Subtract register 'f' and carry flag
(borrow) from W (2’s complement
method). If 'd' is 0, the result is
stored in W. If 'd' is 1, the result is
stored in register 'f' (default). If ’a’ is
0, the Access Bank will be selected,
overriding the BSR value. If ’a’ is 1,
then the bank will be selected as
per the BSR value (default).
1
1
SUBFWB
SUBFWB
SUBFWB
Read
Q2
0101
3
2
1
FF
2
0
0
1
2
5
1
2
3
1
0
0
1
2
0
0
2
1
1
0
© 2006 Microchip Technology Inc.
f
[0,1]
[0,1]
; result is negative
; result is positive
; result is zero
255
01da
REG, 1, 0
REG, 0, 0
REG, 1, 0
Process
Data
Q3
dest
ffff
f [,d [,a]
destination
Write to
Q4
ffff