PIC18F442-I/L Microchip Technology, PIC18F442-I/L Datasheet - Page 249

IC MCU FLASH 8KX16 EE A/D 44PLCC

PIC18F442-I/L

Manufacturer Part Number
PIC18F442-I/L
Description
IC MCU FLASH 8KX16 EE A/D 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F442-I/L

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Controller Family/series
PIC18
No. Of I/o's
34
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
MSSP, SPI, I2C, PSP, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Package
44PLCC
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164309 - MODULE SKT FOR PM3 44PLCCXLT44L2 - SOCKET TRAN ICE 44PLCC444-1001 - DEMO BOARD FOR PICMICRO MCUDVA16XL441 - ADAPTER DEVICE ICE 44PLCCDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Lead Free Status / Rohs Status
 Details
Other names
PIC18F442I/L

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F442-I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
SUBLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
Example 3:
© 2006 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
W
C
W
C
Z
N
W
C
W
C
Z
N
W
C
W
C
Z
N
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
literal 'k'
[ label ] SUBLW k
0
k – (W)
N, OV, C, DC, Z
W is subtracted from the eight-bit
literal 'k'. The result is placed
in W.
1
1
SUBLW
SUBLW
SUBLW
Subtract W from literal
Read
Q2
0000
1
?
1
1
0
0
2
?
0
1
1
0
3
?
FF ; (2’s complement)
0
0
1
k
; result is negative
; result is positive
; result is zero
255
0x02
0x02
0x02
1000
W
Process
Data
Q3
kkkk
Write to W
Q4
kkkk
SUBWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
Example 3:
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
register 'f'
Subtract W from f
[ label ] SUBWF
0
d
a
(f) – (W)
N, OV, C, DC, Z
Subtract W from register 'f' (2’s
complement method). If 'd' is 0,
the result is stored in W. If 'd' is 1,
the result is stored back in regis-
ter 'f' (default). If ’a’ is 0, the
Access Bank will be selected,
overriding the BSR value. If ’a’ is
1, then the bank will be selected
as per the BSR value (default).
1
1
SUBWF
SUBWF
SUBWF
Read
Q2
0101
3
2
?
1
2
1
0
0
2
2
?
2
0
1
1
0
1
2
?
FFh ;(2’s complement)
2
0
0
1
f
[0,1]
[0,1]
PIC18FXX2
; result is positive
; result is zero
; result is negative
255
REG, 1, 0
REG, 0, 0
REG, 1, 0
11da
dest
Process
Data
Q3
DS39564C-page 247
ffff
f [,d [,a]
destination
Write to
Q4
ffff

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