AT91SAM7S16-MU Atmel, AT91SAM7S16-MU Datasheet - Page 108

MCU ARM 16K HI SPD FLASH 48-QFN

AT91SAM7S16-MU

Manufacturer Part Number
AT91SAM7S16-MU
Description
MCU ARM 16K HI SPD FLASH 48-QFN
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7S16-MU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Note:
Figure 19-4. Code Read Optimization in Thumb Mode for FWS = 3
Note:
108
ARM Request (16-bit)
Buffer (32 bits)
Data To ARM
Flash Access
Master Clock
When FWS is equal to 1, in case of sequential reads, all the accesses are performed in a single-cycle access (except for the
first one).
When FWS is equal to 2 or 3, in case of sequential reads, the first access takes FWS cycles, the second access one cycle, the
third access FWS cycles, the fourth access one cycle, etc.
Code Fetch
AT91SAM7S Series Preliminary
@Byte 0
3 Wait State Cycles
Bytes 0-3
@2
0-1
3 Wait State Cycles
@4
2-3
Bytes 0-3
Bytes 4-7
@6
4-5
3 Wait State Cycles
@8
6-7
Bytes 8-11
Bytes 4-7
@10
8-9 10-11
3 Wait State Cycles
@12
6175K–ATARM–30-Aug-10
Bytes 12-15
Bytes 8-11
12-13

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