PIC18C801-I/PT Microchip Technology, PIC18C801-I/PT Datasheet - Page 63

• Manufacturer Part Number: PIC18C801-I/PT
• Description: IC PIC MCU ROMLESS 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/PT

• Core Size: 8-Bit
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 67
• Ram Memory Size: 1.5KB
• Cpu Speed: 6.25MIPS
• No. Of Timers: 4
• Program Memory Size: EXT
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801I/PT

5.0
The External Memory Interface is a feature of the
PIC18C601/801 that allows the processor to access
external memory devices, such as FLASH, EPROM,
SRAM, etc. Memory mapped peripherals may also be
accessed.
The External Memory Interface physical implementa-
tion includes up to 26 pins on the PIC18C601 and up to
38 pins on the PIC18C801. These pins are reserved for
external address/data bus functions.
REGISTER 5-1:
2001 Microchip Technology Inc.
EXTERNAL MEMORY
INTERFACE
bit 7
bit 6
bit 5-4
bit 3-2
bit 1-0
MEMCON REGISTER
EBDIS: External Bus Disable
1 = External system bus disabled, all external bus drivers are mapped as I/O ports
0 = External system bus enabled, and I/O ports are disabled
PGRM: Program RAM Enable
1 = 512 bytes of internal RAM enabled as internal program memory from location 1FFE00h to
0 = Internal RAM enabled as internal GPR memory from 400h to 5FFh. Program memory from
WAIT<1:0>: Table Reads and Writes Bus Cycle Wait Count
11 = Table reads and writes will wait 0 T
10 = Table reads and writes will wait 1 T
01 = Table reads and writes will wait 2 T
00 = Table reads and writes will wait 3 T
Unimplemented: Read as '0'
WM<1:0>: TABLWT Operation with 16-bit Bus
1X = Word Write mode: TABLAT0 and TABLAT1 word output, WRH active when TABLAT1 written
01 = Byte Select mode: TABLAT data copied on both MS and LS Byte, WRH and (UB or LB) will
00 = Byte Write mode: TABLAT data copied on both MS and LS Byte, WRH or WRL will activate
bit7
Legend:
R = Readable bit
- n = Value at POR
EBDIS
R/W-0
1FFFFFh, external program memory at these locations is unused. Internal GPR memory
from 400h to 5FFh is disabled and returns 00h.
location 1FFE00h to 1FFFFFh is configured as external program memory.
activate
PGRM
R/W-0
Advance Information
WAIT1
R/W-0
W = Writable bit
’1’ = Bit is set
WAIT0
R/W-0
CY
CY
CY
CY
These pins are multiplexed with I/O port pins, but the
I/O functions are only enabled when program execution
takes place in internal Boot RAM and the EBDIS bit in
the MEMCON register is set (see Register 5-1).
5.1
Register 5-1 shows the Memory Control Register
(MEMCON). This register contains bits used to control
the operation of the External Memory Interface.
Memory Control Register
(MEMCON)
U-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
—
PIC18C601/801
U-0
—
x = Bit is unknown
R/W-0
WM1
DS39541A-page 63
R/W-0
WM0
bit0