PIC18C801-I/PT Microchip Technology, PIC18C801-I/PT Datasheet - Page 108

• Manufacturer Part Number: PIC18C801-I/PT
• Description: IC PIC MCU ROMLESS 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/PT

• Core Size: 8-Bit
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 67
• Ram Memory Size: 1.5KB
• Cpu Speed: 6.25MIPS
• No. Of Timers: 4
• Program Memory Size: EXT
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801I/PT

PIC18C601/801
9.3
PORTC is an 8-bit wide, bi-directional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (= 1) will make the corresponding PORTC
pin an input (i.e., put the corresponding output driver in
a Hi-Impedance mode). Clearing a TRISC bit (= 0) will
make the corresponding PORTC pin an output (i.e., put
the contents of the output latch on the selected pin).
Read-modify-write operations on the LATC register,
read and write the latched output value for PORTC.
PORTC is multiplexed with several peripheral functions
(Table 9-5). PORTC pins have Schmitt Trigger input
buffers.
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an out-
put, while other peripherals override the TRIS bit to make
a pin an input. The user should refer to the correspond-
ing peripheral section for the correct TRIS bit settings.
FIGURE 9-6:
DS39541A-page 108
Note 1: I/O pins have diode protection to V
Peripheral Out Select
Peripheral Data Out
Data Bus
WR LATC
or
WR PORTC
WR TRISC
Peripheral Enable
RD PORTC
Peripheral Data In
PORTC, TRISC and LATC
Registers
PORTC BLOCK DIAGRAM (PERIPHERAL OUTPUT OVERRIDE)
TRIS Latch
Data Latch
D
D
CK
CK
RD TRISC
RD LATC
Q
Q
Q
Q
DD
Advance Information
Override
and V
TRIS
0
1
SS
Q
.
EN
D
Schmitt
Trigger
The pin override value is not loaded into the TRIS reg-
ister. This allows read-modify-write of the TRIS register,
without concern due to peripheral overrides.
EXAMPLE 9-3:
CLRF
CLRF
MOVLW
MOVWF
V
V
N
P
SS
DD
PORTC
LATC
0CFh
TRISC
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
Pin
I/O pin
Override Peripheral
(1)
INITIALIZING PORTC
; Initialize PORTC by
; Alternate method
; Value used to
; RC5:RC4 as outputs
; RC7:RC6 as inputs
; clearing output
; data latches
; to clear output
; data latches
; initialize data
; direction
; Set RC3:RC0 as inputs
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
TRIS OVERRIDE
2001 Microchip Technology Inc.
Timer1 OSC for
Timer1/Timer3
Timer1 OSC for
Timer1/Timer3
—
SPI/I
I
SPI Data Out
USART Async Xmit,
Sync Clock
USART Sync Data Out
2
C Data Out
2
C Master Clock