PIC18C801-I/PT Microchip Technology, PIC18C801-I/PT Datasheet - Page 309
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18C801-I/PT
Manufacturer Part Number
PIC18C801-I/PT
Description
IC PIC MCU ROMLESS 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18C601-IL.pdf
(320 pages)
3.PIC18C601-IL.pdf
(10 pages)
4.PIC18C601-IL.pdf
(10 pages)
Specifications of PIC18C801-I/PT
Core Size
8-Bit
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Number Of I /o
37
Program Memory Type
ROMless
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
67
Ram Memory Size
1.5KB
Cpu Speed
6.25MIPS
No. Of Timers
4
Program Memory Size
EXT
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
3-Wire, I2C, SPI, USART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
47
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18C801I/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C801-I/PT
Manufacturer:
Microchip Technology
Quantity:
135
Company:
Part Number:
PIC18C801-I/PT
Manufacturer:
MICROCHIP
Quantity:
99
Company:
Part Number:
PIC18C801-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
ICEPIC In-Circuit Emulator .............................................. 260
INCF ................................................................................ 236
INCFSZ ............................................................................ 237
In-Circuit Serial Programming (ICSP) .............................. 207
Indirect Addressing ............................................................ 60
INFSNZ ............................................................................ 237
Initialization Conditions for All Registers ............................ 34
Instruction Cycle ................................................................ 46
Instruction Flow/Pipelining ................................................. 47
Instruction Format ............................................................ 217
Instruction Set .................................................................. 215
2001 Microchip Technology Inc.
Clock Arbitration ...................................................... 171
Clock Arbitration Timing (Master Transmit) ............. 171
General Call Address Support ................................. 162
Master Mode 7-bit Reception Timing ....................... 169
Master Mode Operation ........................................... 164
Master Mode START Condition ............................... 165
Master Mode Transmission ..................................... 167
Master Mode Transmit Sequence ........................... 164
Multi-Master Mode ................................................... 172
Repeated START Condition Timing ........................ 166
STOP Condition Receive or Transmit Timing .......... 170
STOP Condition Timing ........................................... 170
Waveforms for 7-bit Reception ................................ 161
Waveforms for 7-bit Transmission ........................... 161
FSR Register ............................................................. 59
ADDLW .................................................................... 221
ADDWF ................................................................... 221
ADDWFC ................................................................. 222
ANDLW .................................................................... 222
ANDWF ................................................................... 223
BC ............................................................................ 223
BCF ......................................................................... 224
BN ............................................................................ 224
BNC ......................................................................... 225
BNN ......................................................................... 225
BNOV ...................................................................... 226
BNZ ......................................................................... 226
BOV ......................................................................... 229
BRA ......................................................................... 227
BSF .......................................................................... 227
BTFSC ..................................................................... 228
BTFSS ..................................................................... 228
BTG ......................................................................... 229
BZ ............................................................................ 230
CALL ........................................................................ 230
CLRF ....................................................................... 231
CLRWDT ................................................................. 231
COMF ...................................................................... 232
CPFSEQ .................................................................. 232
CPFSGT .................................................................. 233
CPFSLT ................................................................... 233
DAW ........................................................................ 234
DCFSNZ .................................................................. 235
DECF ....................................................................... 234
DECFSZ .................................................................. 235
GOTO ...................................................................... 236
INCF ........................................................................ 236
INCFSZ .................................................................... 237
INFSNZ .................................................................... 237
IORLW ..................................................................... 238
IORWF ..................................................................... 238
LFSR ....................................................................... 239
MOVF ...................................................................... 239
MOVFF .................................................................... 240
Advance Information
Instruction Set, Summary ................................................ 218
INT Interrupt (RB0/INT). See Interrupt Sources
INTCON Register
Inter-Integrated Circuit. See I
Interrupt Control Registers ................................................ 91
Interrupt Sources .......................................................89
Interrupts, Enable Bits
Interrupts, Flag Bits
IORLW ............................................................................. 238
IORWF ............................................................................ 238
MOVLB .................................................................... 240
MOVLW ................................................................... 241
MOVWF .................................................................. 241
MULLW ................................................................... 242
MULWF ................................................................... 242
NEGF ...................................................................... 243
NOP ........................................................................ 243
POP ......................................................................... 244
PUSH ...................................................................... 244
RCALL ..................................................................... 245
RESET .................................................................... 245
RETFIE ................................................................... 246
RETLW .................................................................... 246
RETURN ................................................................. 247
RLCF ....................................................................... 247
RLNCF .................................................................... 248
RRCF ...................................................................... 248
RRNCF .................................................................... 249
SETF ....................................................................... 249
SLEEP ..................................................................... 250
SUBFWB .........................................................250
SUBLW ................................................................... 251
SUBWF ................................................................... 252
SUBWFB ................................................................. 253
SWAPF ................................................................... 254
TBLRD .................................................................... 255
TBLWT .................................................................... 256
TSTFSZ ................................................................... 257
XORLW ................................................................... 257
XORWF ................................................................... 258
RBIF Bit ................................................................... 105
INTCON Register ...................................................... 91
INTCON2 Register .................................................... 92
INTCON3 Register .................................................... 93
IPR Registers ............................................................ 99
PIE Registers ............................................................ 97
PIR Registers ............................................................ 95
RCON Register ......................................................... 94
A/D Conversion Complete ....................................... 197
Capture Complete (CCP) ........................................ 143
Compare Complete (CCP) ...................................... 144
Interrupt-on-Change (RB7:RB4) ............................. 105
RB0/INT Pin, External ............................................. 101
SSP Receive/Transmit Complete ............................ 149
TMR0 Overflow ....................................................... 129
TMR1 Overflow ...............................................130
TMR2 to PR2 Match ................................................ 136
TMR2 to PR2 Match (PWM) ...........................135
TMR3 Overflow ...............................................137
USART Receive/Transmit Complete ....................... 177
CCP1 Enable (CCP1IE Bit) ..................................... 143
A/D Converter Flag (ADIF Bit) ................................. 195
CCP1 Flag (CCP1IF Bit) ........................ 142
Interrupt-on-Change (RB7:RB4) Flag
(RBIF Bit) ................................................ 105
PIC18C601/801
2
C
DS39541A-page 309
,
143
,
,
,
,
,
,
251
207
133
146
139
144