AT89C5122D-PSTUM Atmel, AT89C5122D-PSTUM Datasheet - Page 49

IC 8051 MCU FLASH 32K 64QFN

AT89C5122D-PSTUM

Manufacturer Part Number
AT89C5122D-PSTUM
Description
IC 8051 MCU FLASH 32K 64QFN
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C5122D-PSTUM

Core Processor
8051
Core Size
8-Bit
Speed
48MHz
Connectivity
SmartCard, SPI, UART/USART, USB
Peripherals
LED, POR, WDT
Number Of I /o
46
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFN
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
4202F–SCR–07/2008
Table 26. Clock Configuration Register 0 - CKCON0 (S:8Fh)
Reset Value = X0X0 X000b
Bit Number Bit Mnemonic Description
7
-
7
6
5
4
3
2
1
0
WDX2
6
WDX2
T1X2
T0X2
SIX2
X2
-
-
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Watchdog clock
This control bit is validated when the CPU clock X2 is set; when X2 is low,
this bit has no effect.
Cleared to bypass the 1/2 prescaler.
Set to select the 1/2 output for this peripheral.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enhanced UART clock (Mode 0 and 2)
This control bit is validated when the CPU clock X2 is set; when X2 is low,
this bit has no effect.
Cleared to bypass the 1/2 prescaler.
Set to select the 1/2 output for this peripheral.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Timer 1 clock
This control bit is validated when the CPU clock X2 is set; when X2 is low,
this bit has no effect.
Cleared to bypass the 1/2 prescaler.
Set to select the 1/2 output for this peripheral.
Timer 0 clock
This control bit is validated when the CPU clock X2 is set; when X2 is low,
this bit has no effect.
Cleared to bypass the 1/2 prescaler.
Set to select the 1/2 output for this peripheral.
System clock Control bit
Cleared to select the PRT output for CPU and all the peripherals .
Set to bypass the PRT prescaler and to enable the individual peripherals ‘X2’
bits.
5
-
AT83R5122, AT8xC5122/23
SIX2
4
3
-
T1X2
2
T0X2
1
X2
0
49

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