AT89C5122D-PSTUM Atmel, AT89C5122D-PSTUM Datasheet - Page 126

IC 8051 MCU FLASH 32K 64QFN

AT89C5122D-PSTUM

Manufacturer Part Number
AT89C5122D-PSTUM
Description
IC 8051 MCU FLASH 32K 64QFN
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C5122D-PSTUM

Core Processor
8051
Core Size
8-Bit
Speed
48MHz
Connectivity
SmartCard, SPI, UART/USART, USB
Peripherals
LED, POR, WDT
Number Of I /o
46
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFN
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Broadcast Address
Reset Addresses
Timer 1
126
AT83R5122, AT8xC5122/23
The SADEN byte is selected so that each slave may be addressed separately.
For slave A, bit 0 (the LSB) is a don’t care bit; for slaves B and C, bit 0 is a 1. To commu-
nicate with slave A only, the master must send an address where bit 0 is clear (e.g.
1111 0000b).
For slave A, bit 1 is a 1; for slaves B and C, bit 1 is a don’t care bit. To communicate with
slaves B and C, but not slave A, the master must send an address with bits 0 and 1 both
set (e.g. 1111 0011b).
To communicate with slaves A, B and C, the master must send an address with bit 0 set,
bit 1 clear, and bit 2 clear (e.g. 1111 0001b).
A broadcast address is formed from the logical OR of the SADDR and SADEN registers
with zeros defined as don’t care bits, e.g.:
The use of don’t care bits provides flexibility in defining the broadcast address, however
in most applications, a broadcast address is FFh. The following is an example of using
broadcast addresses:
For slaves A and B, bit 2 is a don’t care bit; for slave C, bit 2 is set. To communicate with
all of the slaves, the master must send an address FFh. To communicate with slaves A
and B, but not slave C, the master can send and address FBh.
On reset, the SADDR and SADEN registers are initialized to 00h, i.e. the given and
broadcast addresses are XXXX XXXXb (all don’t care bits). This ensures that the serial
port will reply to any address, and so, that it is backwards compatible with the 80C51
microcontrollers that does not support automatic address recognition.
When using the Timer 1, the Baud Rate is derived from the overflow of the timer. As
shown in Figure 67 the Timer 1 is used in its 8-bit auto-reload mode). SMOD1 bit in
PCON register allows doubling of the generated baud rate.
Slave A:SADDR1111 0001b
Slave B:SADDR1111 0011b
Slave C:SADDR=1111 0010b
Broadcast =SADDR OR SADEN1111 111Xb
SADDR0101 0110b
SADEN1111 1100b
SADEN1111 1010b
Broadcast1111 1X11b,
SADEN1111 1001b
Broadcast1111 1X11B,
SADEN1111 1101b
Broadcast1111 1111b
4202F–SCR–07/2008

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