PIC18F2510-I/SP Microchip Technology, PIC18F2510-I/SP Datasheet - Page 75

IC MCU FLASH 16KX16 28-DIP

PIC18F2510-I/SP

Manufacturer Part Number
PIC18F2510-I/SP
Description
IC MCU FLASH 16KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2510-I/SP

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
25
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2510-I/SP
Manufacturer:
TM
Quantity:
50 000
6.0
In PIC18F2X1X/4X1X devices, the program memory is
implemented as read-only Flash memory. It is readable
over the entire V
read from program memory is executed on one byte at
a time.
6.1
For PIC18 devices, there are two operations that allow
the processor to move bytes between the program
memory space and the data RAM: table read (TBLRD)
and table write (TBLWT).
Table read operations retrieve data from program
memory and place it into the data RAM space.
Figure 6-1 shows the operation of a table read with
program memory and data RAM.
The program memory space is 16 bits wide, while the
data RAM space is 8 bits wide. Table reads and table
writes move data between these two memory spaces
through an 8-bit register, TABLAT.
FIGURE 6-1:
© 2009 Microchip Technology Inc.
Note 1: Table Pointer register points to a byte in program memory.
TBLPTRU
FLASH PROGRAM MEMORY
Table Reads
DD
Table Pointer
TBLPTRH
range during normal operation. A
TABLE READ OPERATION
(1)
TBLPTRL
Program Memory
(TBLPTR)
Instruction: TBLRD*
Program Memory
Table reads work with byte entities. A table block
containing data, rather than program instructions, is not
required to be word-aligned. Therefore, a table block can
start and end at any byte address.
Because the program memory cannot be written to or
erased under normal operation, the TBLWT operation is
not discussed here.
Note 1: Although
PIC18F2X1X/4X1X
2: The TBLWT instruction is available only in
PIC18F2X1X/4X1X devices in normal
operation, the TBLWT instruction is still
implemented in the instruction set.
Executing the instruction takes two
instruction cycles, but effectively results
in a NOP.
programming modes and is used during
In-Circuit Serial Programming™ (ICSP™).
it
cannot
Table Latch (8-bit)
TABLAT
DS39636D-page 77
be
used
in

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