PIC18F2510-I/SP Microchip Technology, PIC18F2510-I/SP Datasheet - Page 52

IC MCU FLASH 16KX16 28-DIP

PIC18F2510-I/SP

Manufacturer Part Number
PIC18F2510-I/SP
Description
IC MCU FLASH 16KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2510-I/SP

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
25
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2510-I/SP
Manufacturer:
TM
Quantity:
50 000
PIC18F2X1X/4X1X
TABLE 4-4:
DS39636D-page 54
IPR2
PIR2
PIE2
IPR1
PIR1
PIE1
OSCTUNE
TRISE
TRISD
TRISC
TRISB
TRISA
LATE
LATD
LATC
LATB
LATA
PORTE
PORTD
PORTC
PORTB
PORTA
Legend:
Note 1:
Register
(5)
(5)
2:
3:
4:
5:
(5)
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
See Table 4-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as
PORTA pins, they are disabled and read ‘0’.
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Applicable Devices
Power-on Reset,
11-- 1111
00-- 0000
00-- 0000
1111 1111
-111 1111
0000 0000
-000 0000
0000 0000
-000 0000
00-0 0000
0000 -111
1111 1111
1111 1111
1111 1111
1111 1111
---- -xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- x000
xxxx xxxx
xxxx xxxx
xxxx xxxx
xx0x 0000
Brown-out
Reset
(5)
(5)
(5)
MCLR Resets,
Stack Resets
WDT Reset,
Instruction,
11-- 1111
00-- 0000
00-- 0000
1111 1111
-111 1111
0000 0000
-000 0000
0000 0000
-000 0000
00-0 0000
0000 -111
1111 1111
1111 1111
1111 1111
1111 1111
---- -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- x000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uu0u 0000
© 2009 Microchip Technology Inc.
RESET
(5)
(5)
(5)
Wake-up via
uu-- uuuu
uu-- uuuu
uu-- uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
-uuu uuuu
uu-u uuuu
uuuu -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
or Interrupt
WDT
(1)
(1)
(1)
(5)
(5)
(5)

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