PIC18F46J50-I/ML Microchip Technology, PIC18F46J50-I/ML Datasheet - Page 283

IC PIC MCU FLASH 64KB 44-QFN

PIC18F46J50-I/ML

Manufacturer Part Number
PIC18F46J50-I/ML
Description
IC PIC MCU FLASH 64KB 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F46J50-I/ML

Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Timers
2
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136, MA180024, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Package
44QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
A/d Bit Size
10 bit
A/d Channels Available
13
Height
0.88 mm
Length
8 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.15 V
Width
8 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F46J50-I/ML
Manufacturer:
Microchip Technology
Quantity:
1 830
Part Number:
PIC18F46J50-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
REGISTER 18-5:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-1
SMP
2:
3:
This bit is cleared on Reset and when SSPEN is cleared.
This bit holds the R/W bit information following the last address match. This bit is only valid from the
address match to the next Start bit, Stop bit or not ACK bit.
ORing this bit with SEN, RSEN, PEN, RCEN or ACKEN will indicate if the MSSPx is in Active mode.
SMP: Slew Rate Control bit
In Master or Slave mode:
1 = Slew rate control disabled for Standard Speed mode (100 kHz and 1 MHz)
0 = Slew rate control enabled for High-Speed mode (400 kHz)
CKE: SMBus Select bit
In Master or Slave mode:
1 = Enable SMBus specific inputs
0 = Disable SMBus specific inputs
D/A: Data/Address bit
In Master mode:
Reserved.
In Slave mode:
1 = Indicates that the last byte received or transmitted was data
0 = Indicates that the last byte received or transmitted was address
P: Stop bit
1 = Indicates that a Stop bit has been detected last
0 = Stop bit was not detected last
S: Start bit
1 = Indicates that a Start bit has been detected last
0 = Start bit was not detected last
R/W: Read/Write Information bit
In Slave mode:
1 = Read
0 = Write
In Master mode:
1 = Transmit is in progress
0 = Transmit is not in progress
UA: Update Address bit (10-Bit Slave mode only)
1 = Indicates that the user needs to update the address in the SSPxADD register
0 = Address does not need to be updated
BF: Buffer Full Status bit
In Transmit mode:
1 = SSPxBUF is full
0 = SSPxBUF is empty
In Receive mode:
1 = SSPxBUF is full (does not include the ACK and Stop bits)
0 = SSPxBUF is empty (does not include the ACK and Stop bits)
R/W-1
CKE
SSPxSTAT: MSSPx STATUS REGISTER (I
(1)
(1)
W = Writable bit
‘1’ = Bit is set
D/A
R-1
(2,3)
R-1
P
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F46J50 FAMILY
R-1
S
(1)
2
C™ MODE) (ACCESS FC7h, F73h)
R/W
R-1
(2,3)
x = Bit is unknown
R-1
UA
DS39931C-page 283
R-1
BF
bit 0

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