PIC18F46J50-I/ML Microchip Technology, PIC18F46J50-I/ML Datasheet - Page 235

• Manufacturer Part Number: PIC18F46J50-I/ML
• Description: IC PIC MCU FLASH 64KB 44-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46J50-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 44-QFN
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136, MA180024, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Package: 44QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• A/d Bit Size: 10 bit
• A/d Channels Available: 13
• Height: 0.88 mm
• Length: 8 mm
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.15 V
• Width: 8 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

16.3
The alarm features and characteristics are:
• Configurable from half a second to one year
• Enabled using the ALRMEN bit (ALRMCFG<7>,
• Offers one-time and repeat alarm options
16.3.1
The alarm feature is enabled using the ALRMEN bit.
This bit is cleared when an alarm is issued. The bit will
not be cleared if the CHIME bit = 1 or if ALRMRPT ≠ 0.
The interval selection of the alarm is configured
through the ALRMCFG bits (AMASK<3:0>). (See
Figure 16-5.) These bits determine which and how
many digits of the alarm must match the clock value for
the alarm to occur.
FIGURE 16-5:
© 2009 Microchip Technology Inc.
Register 16-4)
Note 1:
0000 – Every half second
0001 – Every second
0010 – Every 10 seconds
0011 – Every minute
0100 – Every 10 minutes
0101 – Every hour
0110 – Every day
0111 – Every week
1000 – Every month
1001 – Every year
Alarm Mask Setting
AMASK3:AMASK0
Alarm
CONFIGURING THE ALARM
Annually, except when configured for February 29.
ALARM MASK SETTINGS
(1)
Day of the
Week
d
Month
m
m
PIC18F46J50 FAMILY
The alarm can also be configured to repeat based on a
preconfigured interval. The number of times this occurs
after the alarm is enabled is stored in the ALRMRPT
register.
Note:
d
d
Day
d
d
While the alarm is enabled (ALRMEN = 1),
changing any of the registers – other than
the RTCCAL, ALRMCFG and ALRMRPT
registers and the CHIME bit – can result in
a false alarm event leading to a false
alarm interrupt. To avoid this, only change
the timer and alarm values while the alarm
is disabled (ALRMEN = 0). It is recom-
mended
ALRMRPT registers and CHIME bit be
changed when RTCSYNC = 0.
Hours
h
h
h
h
h
h
h
h
that
Minutes
m
m
m
m
m
the
m
m
m
m
m
m
DS39931C-page 235
ALRMCFG
Seconds
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
and