PIC18LF44J50-I/ML Microchip Technology, PIC18LF44J50-I/ML Datasheet - Page 6
![IC PIC MCU FLASH 16K 2V 44-QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF44J50-I/ML
Manufacturer Part Number
PIC18LF44J50-I/ML
Description
IC PIC MCU FLASH 16K 2V 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18LF24J50-ISS.pdf
(554 pages)
3.PIC18LF24J50-ISS.pdf
(12 pages)
Specifications of PIC18LF44J50-I/ML
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
31 KHz
Number Of Programmable I/os
22
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC18F46J50 FAMILY
Pin Diagrams (Continued)
DS39931C-page 6
Legend:
Note 1:
44-Pin QFN
RB2/AN8/CTEDG1/PMA3/VMO/REFO/RP5
2:
3:
RPn represents remappable pins.
RC7/PMA4/RX1/DT1/SDO1/RP18
Some input and output functions are routed through the Peripheral Pin Select (PPS) module and can be
dynamically assigned to any of the RPn pins. For a list of the input and output functions, see Table 9-13 and
Table 9-14, respectively. For details on configuring the PPS module, see Section 9.7 “Peripheral Pin
Select (PPS)”.
See Section 26.3 “On-Chip Voltage Regulator” for details on how to connect the V
For the QFN package, it is recommended that the bottom pad be connected to V
RB1/AN10/PMBE/RTCC/RP4
(1,3)
RB0/AN12/INT0/RP3
RD4/PMD4/RP21
RD5/PMD5/RP22
RD6/PMD6/RP23
RD7/PMD7/RP24
AV
V
V
DD
DD
SS
1
2
3
4
5
6
7
8
9
10
11
PIC18F4XJ50
33
32
31
30
29
28
27
26
25
24
23
= Pins are up to 5.5V tolerant
OSC2/CLKO/RA6
OSC1/CLKI/RA7
V
AV
V
AV
RE2/AN7/PMCS
RE1/AN6/PMWR
RE0/AN5/PMRD
RA5/AN4/SS1/HLVDIN/RCV/RP2
V
SS
DD
DDCORE
SS
DD
© 2009 Microchip Technology Inc.
SS
.
/V
DDCORE
CAP
(2)
/V
CAP
pin.
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