PIC18LF44J50-I/ML Microchip Technology, PIC18LF44J50-I/ML Datasheet - Page 522
![IC PIC MCU FLASH 16K 2V 44-QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF44J50-I/ML
Manufacturer Part Number
PIC18LF44J50-I/ML
Description
IC PIC MCU FLASH 16K 2V 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18LF24J50-ISS.pdf
(554 pages)
3.PIC18LF24J50-ISS.pdf
(12 pages)
Specifications of PIC18LF44J50-I/ML
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
31 KHz
Number Of Programmable I/os
22
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC18F46J50 FAMILY
TABLE 29-29: A/D CONVERTER CHARACTERISTICS: PIC18F46J50 FAMILY (INDUSTRIAL)
FIGURE 29-22:
DS39931C-page 522
Param
A01
A03
A04
A06
A07
A10
A20
A21
A22
A25
A30
A50
Note 1:
No.
Note 1: If the A/D clock source is selected as RC, a time of T
A/D DATA
SAMPLE
2:
A/D CLK
ADRES
Symbol
N
E
E
E
E
ΔV
V
V
V
Z
I
BSF ADCON0, GO
REF
ADIF
REFH
REFL
AIN
AIN
IL
DL
OFF
GN
R
2: This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
GO
REF
The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
V
V
Q4
REFH
REFL
This allows the SLEEP instruction to be executed.
Resolution
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Monotonicity
Reference Voltage Range
(V
Reference Voltage High
Reference Voltage Low
Analog Input Voltage
Recommended Impedance of
Analog Voltage Source
V
current is from RA2/AN2/V
132
current is from RA3/AN3/V
REF
REFH
A/D CONVERSION TIMING
Input Current
– V
Characteristic
REFL
(Note 2)
)
9
(2)
8
REF
REF
OLD_DATA
-/CV
7
+/C1INB pin or V
V
REF
SS
. . .
SAMPLING STOPPED
V
V
Min
2.0
REFL
REFL
—
—
—
—
—
—
—
—
/C2INB pin or V
– 0.3V
3
. . .
CY
131
130
Guaranteed
is added before the A/D clock starts.
DD
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
, whichever is selected as the V
2
SS
(1)
, whichever is selected as the V
V
1
DD
V
V
<±3.5
Max
<±1
<±1
<±3
150
REFH
REFH
10
—
—
10
+ 0.3V
5
0
© 2009 Microchip Technology Inc.
Units
LSb ΔV
LSb ΔV
LSb ΔV
LSb ΔV
kΩ
μA
μA
bit
—
V
V
V
V
V
ΔV
V
V
V
During V
During A/D conversion
cycle.
NEW_DATA
DONE
SS
DD
DD
REF
REF
REF
REF
REF
≤ V
< 3.0V
≥ 3.0V
REFH
Conditions
T
CY
≥ 3.0V
≥ 3.0V
≥ 3.0V
≥ 3.0V
≥ 3.0V
AIN
AIN
(Note 1)
source.
REFL
≤ V
acquisition.
REF
source.
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