PIC16C770-I/SO Microchip Technology, PIC16C770-I/SO Datasheet - Page 21

IC MCU OTP 2KX14 A/D PWM 20-SOIC

PIC16C770-I/SO

Manufacturer Part Number
PIC16C770-I/SO
Description
IC MCU OTP 2KX14 A/D PWM 20-SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C770-I/SO

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Number Of I /o
15
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Controller Family/series
PIC16C
No. Of I/o's
16
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC164028 - MODULE SKT PROMATEII 20SOIC/DIP309-1013 - ADAPTER 20-SOIC TO 20-DIP309-1012 - ADAPTER 20-SOIC TO 20-DIP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC16C770I/SO
2.2.2.6
This register contains the individual enable bits for the
SSP bus collision and low voltage detect interrupts.
REGISTER 2-6:
2002 Microchip Technology Inc.
bit 7
bit 6-4
bit 3
bit 2-0
PIE2 REGISTER
PERIPHERAL INTERRUPT ENABLE REGISTER 2 (PIE2: 8Dh)
LVDIE: Low Voltage Detect Interrupt Enable bit
1 = LVD Interrupt is enabled
0 = LVD Interrupt is disabled
Unimplemented: Read as '0'
BCLIE: Bus Collision Interrupt Enable bit
1 = Bus Collision interrupt is enabled
0 = Bus Collision interrupt is disabled
Unimplemented: Read as '0'
bit 7
Legend:
R = Readable bit
- n = Value at POR
R/W-0
LVDIE
U-0
U-0
W = Writable bit
’1’ = Bit is set
U-0
PIC16C717/770/771
BCLIE
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-0
x = Bit is unknown
U-0
DS41120B-page 19
U-0
bit 0

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