PIC16C770-I/SO Microchip Technology, PIC16C770-I/SO Datasheet - Page 124

• Manufacturer Part Number: PIC16C770-I/SO
• Description: IC MCU OTP 2KX14 A/D PWM 20-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C770-I/SO

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI
• Number Of I /o: 15
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Controller Family/series: PIC16C
• No. Of I/o's: 16
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC164028 - MODULE SKT PROMATEII 20SOIC/DIP309-1013 - ADAPTER 20-SOIC TO 20-DIP309-1012 - ADAPTER 20-SOIC TO 20-DIP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: PIC16C770I/SO

PIC16C717/770/771
12.4
A Power-on Reset pulse is generated on-chip when a
V
Enable the internal MCLR feature to eliminate external
RC components usually needed to create a Power-on
Reset. A maximum rise time for V
Electrical Specifications for details. For a long rise time,
enable external MCLR function and use circuit as
shown in Figure 12-5.
Two delay timers, (PWRT on OST), have been pro-
vided which hold the device in RESET after a POR
(dependent upon device configuration) so that all oper-
ational parameters have been met prior to releasing the
device to resume/begin normal operation.
When the device starts normal operation (exits the
RESET condition), device operating parameters (volt-
age, frequency, temperature,...) must be met to ensure
operation. If these conditions are not met, the device
must be held in RESET until the operating conditions
are met. Brown-out Reset may be used to meet the
start-up conditions, or if necessary an external POR cir-
cuit may be implemented to delay end of RESET for as
long as needed.
FIGURE 12-5:
DS41120B-page 122
Note 1: External Power-on Reset circuit is
DD
rise is detected (in the range of 1.5V - 2.1V).
V
DD
2: R < 40 k is recommended to make sure
3: R1 = 100 to 1 k will limit any current
4: External MCLR must be enabled
D
Power-On Reset (POR)
required only if V
slow. The diode D helps discharge the
capacitor quickly when V
that voltage drop across R does not violate
the device’s electrical specification.
flowing into MCLR from external capacitor
C in the event of MCLR/V
down due to Electrostatic Discharge
(ESD) or Electrical Overstress (EOS).
(MCLRE = 1).
V
DD
R
C
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
R1
DD
PIC16C717/770/771
power-up slope is too
MCLR
DD
DD
DD
PP
RAMP)
is specified. See
powers down.
pin break-
12.5
The Power-up Timer provides a fixed T
on power-up type RESETS only. For a POR, the PWRT
is invoked when the POR pulse is generated. For a
BOR, the PWRT is invoked when the device exits the
RESET condition (V
The Power-up Timer operates on an internal RC oscil-
lator. The chip is kept in RESET as long as the PWRT
is active. The PWRT’s time delay is designed to allow
V
provided to enable/disable the PWRT for the POR only.
For a BOR the PWRT is always available regardless of
the configuration bit setting.
The power-up time delay will vary from chip-to-chip due
to V
parameters for details.
12.6
The Oscillator Start-up Timer (OST) provides 1024
oscillator cycle (from OSC1 input) delay after the
PWRT delay is over. This ensures that the crystal oscil-
lator or resonator has started and stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on a power-up type RESET or a wake-
up from SLEEP.
12.7
The Programmable Brown-out Reset module is used to
generate a RESET when the supply voltage falls below
a specified trip voltage. The trip voltage is configurable
to any one of four voltages provided by the BORV<1:0>
configuration word bits.
Configuration bit, BODEN, can disable (if clear/pro-
grammed) or enable (if set) the Brown-out Reset cir-
cuitry. If V
longer than T
ation will RESET the chip. A RESET may not occur if
V
chip will remain in Brown-out Reset until V
above V
that point and will keep the chip in RESET an additional
T
Timer is running, the chip will go back into a Brown-out
Reset and the Power-up Timer will be re-initialized.
Once V
again begin a T
PWRT is always enabled when brown-out is enabled,
the PWRT configuration word bit should be cleared
(enabled) when brown-out is enabled.
PWRT
DD
DD
DD
to rise to an acceptable level. A configuration bit is
falls below the trip point for less than T
. If V
, temperature and process variation. See DC
DD
BOR
Power-up Timer (PWRT)
Oscillator Start-up Timer (OST)
Programmable Brown-Out Reset
(PBOR)
DD
rises above V
DD
. The Power-up Timer will be invoked at
BOR
falls below the specified trip point for
drops below V
, (parameter #35), the brown-out situ-
PWRT
DD
time delay. Even though the
rises above BOR trip point).
BOR
2002 Microchip Technology Inc.
, the Power-up Timer will
BOR
while the Power-up
PWRT
BOR
DD
time-out
. The
rises