PIC16F648A-I/ML Microchip Technology, PIC16F648A-I/ML Datasheet - Page 75

• Manufacturer Part Number: PIC16F648A-I/ML
• Description: IC MCU FLASH 4KX14 EEPROM 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F648A-I/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No.: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNI3DBF648 - BOARD DAUGHTER ICEPIC3AC164033 - ADAPTER 28QFN TO 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Data Converters: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.1
The BRG supports both the Asynchronous and
8-bit baud rate generator. The SPBRG register
Asynchronous mode, bit BRGH (TXSTA<2>) also
controls the baud rate. In Synchronous mode, bit
BRGH is ignored. Table 12-1 shows the formula for
computation of the baud rate for different USART
modes, which only apply in Master mode (internal
clock).
Given the desired baud rate and F
integer value for the SPBRG register can be calculated
using the formula in Table 12-1. From this, the error in
baud rate can be determined.
Example 12-1 shows the calculation of the baud rate
error for the following conditions:
TABLE 12-1:
TABLE 12-2:
© 2005 Microchip Technology Inc.
Synchronous modes of the USART. It is a dedicated
controls the period of a free running 8-bit timer. In
Legend:
Legend:
Address
SYNC
98h
18h
99h
F
Desired Baud Rate = 9600
BRGH = 0
SYNC = 0
OSC
0
1
USART Baud Rate Generator
(BRG)
= 16 MHz
X = value in SPBRG (0 to 255)
SPBRG
RCSTA
TXSTA
x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used for the BRG.
Name
BAUD RATE FORMULA
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
(Asynchronous) Baud Rate = F
Baud Rate Generator Register
(Synchronous) Baud Rate = F
CSRC
SPEN
Bit 7
BRGH = 0 (Low Speed)
Bit 6
RX9
TX9
OSC
SREN
TXEN
Bit 5
, the nearest
CREN
SYNC
Bit 4
OSC
OSC
PIC16F627A/628A/648A
/(64(X+1))
/(4(X+1))
ADEN
Bit 3
—
EQUATION 12-1:
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the F
baud rate error in some cases.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared) and ensures the
BRG does not wait for a timer overflow before
outputting the new baud rate.
The data on the RB1/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin.
Error
BRGH
FERR
Bit 2
Calculated Baud Rate
=
TRMT
OERR
(Calculated Baud Rate - Desired Baud Rate)
---------------------------------------------------------------------------------------------------------- -
Bit 1
Desired Baud Rate
OSC
=
9615 9600
----------------------------- -
/(16(X + 1)) equation can reduce the
9600
Baud Rate = F
TX9D
RX9D
BRGH = 1 (High Speed)
Bit 0
9600
x
CALCULATING BAUD
RATE ERROR
–
Desired Baud Rate
=
=
25.042
16000000
----------------------- -
64 x
=
0000 -010
0000 000x
0000 0000
Value on
-------------------------- -
64 25
=
=
16000000
POR
NA
+
0.16%
-----------------------
64 x
OSC
1
Fosc
+
DS40044D-page 73
/(16(X+1))
+
1
1
other Resets
=
Value on all
0000 -010
0000 000x
0000 0000
9615