PIC16F648A-I/ML Microchip Technology, PIC16F648A-I/ML Datasheet - Page 106

• Manufacturer Part Number: PIC16F648A-I/ML
• Description: IC MCU FLASH 4KX14 EEPROM 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F648A-I/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No.: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNI3DBF648 - BOARD DAUGHTER ICEPIC3AC164033 - ADAPTER 28QFN TO 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Data Converters: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F627A/628A/648A
TABLE 14-7:
DS40044D-page 104
W
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
TMR2
T2CON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
CMCON
OPTION
TRISA
TRISB
PIE1
PCON
PR2
TXSTA
SPBRG
EEDATA
EEADR
EECON1
EECON2
VRCON
Legend:
Note
Register
1: If V
2: One or more bits in INTCON and PIR1 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
4: See Table 14-6 for Reset value for specific condition.
5: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
6: Reset to ‘--00 0000’ on a Brown-out Reset (BOR).
7: Peripherals generating interrupts for wake-up from Sleep will change the resulting bits in the associated registers.
u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.
DD
10Ah, 18Ah
100h, 180h
102h, 182h
103h, 183h
104h, 184h
10Bh,18Bh
01h, 101h
06h, 106h
0Ah, 8Ah,
86h, 186h
0Bh, 8Bh,
00h, 80h,
02h, 82h,
03h, 83h,
04h, 84h,
81h,181h
Address
goes too low, Power-on Reset will be activated and registers will be affected differently.
INITIALIZATION CONDITION FOR REGISTERS
0Ch
0Eh
1Ah
8Ch
8Eh
9Ah
9Bh
9Ch
9Dh
05h
0Fh
10h
12h
15h
16h
17h
18h
19h
1Fh
85h
92h
98h
99h
9Fh
11h
—
Power-on Reset
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
xxxx 0000
xxxx xxxx
---0 0000
0000 000x
0000 -000
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
-000 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 000x
0000 0000
0000 0000
0000 0000
1111 1111
1111 1111
1111 1111
0000 -000
---- 1-0x
1111 1111
0000 -010
0000 0000
xxxx xxxx
xxxx xxxx
---- x000
000- 0000
—
—
• MCLR Reset during normal
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset
operation
---- 1-uq
000q quuu
--uu uuuu
uuuu uuuu
uuuu uuuu
0000 0000
uuuu uuuu
xxxx 0000
uuuu uuuu
---0 0000
0000 000u
0000 -000
uuuu uuuu
uuuu uuuu
0000 0000
-000 0000
uuuu uuuu
uuuu uuuu
--00 0000
0000 000x
0000 0000
0000 0000
0000 0000
1111 1111
1111 1111
1111 1111
0000 -000
1111 1111
0000 -010
0000 0000
uuuu uuuu
uuuu uuuu
---- q000
000- 0000
—
—
(1)
(1,5)
(4)
(6)
• Wake-up from Sleep
• Wake-up from Sleep
interrupt
WDT time out
© 2005 Microchip Technology Inc.
qqqq -qqq
uuuq 0uuu
uuuu uqqq
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uu-- uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu -uuu
---- u-uu
uuuu uuuu
uuuu -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- uuuu
uuu- uuuu
PC + 1
—
—
(3)
(7)
(7)
(2)
(4)
(2)
through
through