PIC16F648A-I/ML Microchip Technology, PIC16F648A-I/ML Datasheet - Page 121

• Manufacturer Part Number: PIC16F648A-I/ML
• Description: IC MCU FLASH 4KX14 EEPROM 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F648A-I/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No.: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNI3DBF648 - BOARD DAUGHTER ICEPIC3AC164033 - ADAPTER 28QFN TO 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Data Converters: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

© 2005 Microchip Technology Inc.
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
None
01
If bit ‘b’ in register ‘f’ is ‘1’, then
the next instruction is skipped.
If bit ‘b’ is ‘1’, then the next
instruction fetched during the
current instruction execution, is
discarded and a NOP is executed
instead, making this a two-cycle
instruction.
1
1(2)
HERE
FALSE
TRUE
Before Instruction
After Instruction
if FLAG<1> = 1,
f
b < 7
127
PC = address HERE
if FLAG<1> = 0,
PC =
PC =
11bb
BTFSS
GOTO
•
•
•
address FALSE
address TRUE
bfff
REG1
PROCESS_CODE
ffff
PIC16F627A/628A/648A
CALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
CLRF
Encoding:
Description:
Words:
Cycles:
Example
Status Affected:
Operands:
Operation:
Syntax:
Call Subroutine
[ label ] CALL k
0
(PC)+ 1
k
(PCLATH<4:3>)
None
10
Call Subroutine. First, return
address (PC + 1) is pushed onto
the stack. The eleven bit imme-
diate address is loaded into PC
bits <10:0>. The upper bits of
the PC are loaded from
PCLATH. CALL is a two-cycle
instruction.
1
2
HERE
Before Instruction
After Instruction
Clear f
[ label ] CLRF
0
00h
1
Z
00
The contents of register ‘f’ are
cleared and the Z bit is set.
1
1
CLRF
Before Instruction
After Instruction
k
f
PC<10:0>,
Z
PC
PC
TOS = Address HERE+1
REG1
REG1
Z
127
(f)
2047
0kkk
CALL
0001
REG1
TOS,
= Address HERE
= Address THERE
DS40044D-page 119
= 0x5A
= 0x00
= 1
f
kkkk
THERE
1fff
PC<12:11>
kkkk
ffff