PIC18F24J11-I/SP Microchip Technology, PIC18F24J11-I/SP Datasheet - Page 384
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PIC18F24J11-I/SP
Manufacturer Part Number
PIC18F24J11-I/SP
Description
IC PIC MCU FLASH 16KB 28-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.MA180023.pdf
(528 pages)
2.PIC18LF24J10-ISS.pdf
(32 pages)
3.PIC18F24J11-ISS.pdf
(14 pages)
Specifications of PIC18F24J11-I/SP
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
16
Ram Memory Size
3.6875KB
Cpu Speed
48MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Embedded Interface Type
EUSART, I2C, SPI
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164329 - MODULE SKT FOR 40DIP 18F45J10
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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- Download datasheet (8Mb)
PIC18F46J11 FAMILY
24.6
A unique feature on board the CTMU module is its
ability to generate system clock independent output
pulses based on an external capacitor value. This is
accomplished using the internal comparator voltage
reference module, Comparator 2 input pin and an
external capacitor. The pulse is output onto the CTPLS
pin. To enable this mode, set the TGEN bit.
See Figure 24-4 for an example circuit. C
chosen by the user to determine the output pulse width
on CTPLS. The pulse width is calculated by
T = (C
source measurement step (Section 24.3.1 “Current
Source Calibration”) and V is the internal reference
voltage (CV
FIGURE 24-4:
24.7
24.7.1
When the device enters any Sleep mode, the CTMU
module current source is always disabled. If the CTMU
is performing an operation that depends on the current
source when Sleep mode is invoked, the operation may
not
measurements may return erroneous values.
24.7.2
The behavior of the CTMU in Idle mode is determined
by the CTMUSIDL bit (CTMUCONH<5>). If CTMUSIDL
is cleared, the module will continue to operate in Idle
mode. If CTMUSIDL is set, the module’s current source
is disabled when the device enters Idle mode. If the
DS39932C-page 384
terminate
PULSE
Creating a Delay with the CTMU
Module
Operation During Sleep/Idle
Modes
/I)*V, where I is known from the current
REF
SLEEP MODE AND DEEP SLEEP
MODES
IDLE MODE
).
correctly.
TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR PULSE
DELAY GENERATION
CTEDG1
C
C2INB
PULSE
Capacitance
and
PULSE
EDG1
time
PIC18F46J11 Device
CV
is
Current Source
REF
Comparator
CTMU
C2
An example use of this feature is for interfacing with
variable capacitive-based sensors, such as a humidity
sensor. As the humidity varies, the pulse width output
on CTPLS will vary. The CTPLS output pin can be con-
nected to an input capture pin and the varying pulse
width is measured to determine the humidity in the
application.
Follow these steps to use this feature:
1.
2.
3.
4.
5.
module is performing an operation when Idle mode is
invoked, in this case, the results will be similar to those
with Sleep mode.
24.8
Upon Reset, all registers of the CTMU are cleared. This
leaves the CTMU module disabled, its current source is
turned off and all configuration options return to their
default settings. The module needs to be re-initialized
following any Reset.
If the CTMU is in the process of taking a measurement at
the time of Reset, the measurement will be lost. A partial
charge may exist on the circuit that was being measured,
and should be properly discharged before the CTMU
makes subsequent attempts to make a measurement.
The circuit is discharged by setting and then clearing the
IDISSEN bit (CTMUCONH<1>) while the A/D Converter
is connected to the appropriate channel.
Initialize Comparator 2.
Initialize the comparator voltage reference.
Initialize the CTMU and enable time delay
generation by setting the TGEN bit.
Set EDG1STAT.
When C
reference trip point, an output pulse is generated
on CTPLS.
Effects of a Reset on CTMU
PULSE
charges to the value of the voltage
CTPLS
© 2009 Microchip Technology Inc.
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