PIC18F24J11-I/SP Microchip Technology, PIC18F24J11-I/SP Datasheet - Page 140
![IC PIC MCU FLASH 16KB 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F24J11-I/SP
Manufacturer Part Number
PIC18F24J11-I/SP
Description
IC PIC MCU FLASH 16KB 28-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.MA180023.pdf
(528 pages)
2.PIC18LF24J10-ISS.pdf
(32 pages)
3.PIC18F24J11-ISS.pdf
(14 pages)
Specifications of PIC18F24J11-I/SP
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
16
Ram Memory Size
3.6875KB
Cpu Speed
48MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Embedded Interface Type
EUSART, I2C, SPI
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164329 - MODULE SKT FOR 40DIP 18F45J10
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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PIC18F46J11 FAMILY
TABLE 9-9:
DS39932C-page 140
RD0/PMD0/
SCL2
RD1/PMD1/
SDA2
RD2/PMD2/
RP19
RD3/PMD3/
RP20
RD4/PMD4/
RP21
RD5/PMD5/
RP22
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; I
Pin
input buffer; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
PORTD I/O SUMMARY
Function
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
SDA2
SCL2
RP19
RP20
RP21
RP22
RD0
RD1
RD2
RD3
RD4
RD5
Setting
TRIS
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
II
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
ST/TTL Parallel Master Port data in.
ST/TTL Parallel Master Port data in.
Type
SMB
SMB
DIG
DIG
I
DIG
DIG
TTL
DIG
I
DIG
DIG
TTL
DIG
DIG
DIG
DIG
DIG
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
ST
2
2
C/
C/
PORTD<0> data input.
LATD<0> data output.
Parallel Master Port data out.
I
module setting.
I
data.
PORTD<1> data input.
LATD<1> data output.
Parallel Master Port data in.
Parallel Master Port data out.
I
module setting.
I
data.
PORTD<2> data input.
LATD<2> data output.
Parallel Master Port data in.
Parallel Master Port data out.
Remappable peripheral pin 19 input.
Remappable peripheral pin 19 output.
PORTD<3> data input.
LATD<3> data output.
Parallel Master Port data out.
Remappable peripheral pin 20 input.
Remappable peripheral pin 20 output.
PORTD<4> data input.
LATD<4> data output.
Parallel Master Port data in.
Parallel Master Port data out.
Remappable peripheral pin 21 input.
Remappable peripheral pin 21 output.
PORTD<5> data input.
LATD<5> data output.
Parallel Master Port data in.
Parallel Master Port data out.
Remappable peripheral pin 22 input.
Remappable peripheral pin 22 output.
2
2
2
2
C™ clock input (MSSP2 module); input type depends on
C™ clock output (MSSP2 module); takes priority over port
C data input (MSSP2 module); input type depends on
C data output (MSSP2 module); takes priority over port
Description
© 2009 Microchip Technology Inc.
2
C/SMB = I
2
C/SMBus
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