PIC18F24J11-I/SP Microchip Technology, PIC18F24J11-I/SP Datasheet - Page 126
![IC PIC MCU FLASH 16KB 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F24J11-I/SP
Manufacturer Part Number
PIC18F24J11-I/SP
Description
IC PIC MCU FLASH 16KB 28-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.MA180023.pdf
(528 pages)
2.PIC18LF24J10-ISS.pdf
(32 pages)
3.PIC18F24J11-ISS.pdf
(14 pages)
Specifications of PIC18F24J11-I/SP
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
16
Ram Memory Size
3.6875KB
Cpu Speed
48MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Embedded Interface Type
EUSART, I2C, SPI
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164329 - MODULE SKT FOR 40DIP 18F45J10
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- Current page: 126 of 528
- Download datasheet (8Mb)
PIC18F46J11 FAMILY
9.1.3
Though the V
these devices are still capable of interfacing with 5V
systems, even if the V
3.6V. This is accomplished by adding a pull-up resistor
to the port pin (Figure 9-2), clearing the LAT bit for that
pin and manipulating the corresponding TRIS bit
(Figure 9-1) to either allow the line to be pulled high or
to drive the pin low. Only port pins that are tolerant of
voltages up to 5.5V can be used for this type of
interface (refer to Section 9.1.2 “Input Pins and
Voltage Considerations”).
FIGURE 9-2:
EXAMPLE 9-1:
9.1.4
The output pins for several peripherals are also
equipped with a configurable open-drain output option.
This allows the peripherals to communicate with
external digital logic operating at a higher voltage level,
without the use of level translators.
DS39932C-page 126
BCF
BCF
BCF
PIC18F46J11
LATD, 7
TRISD, 7 ; send a 0 to the 5V system
TRISD, 7 ; send a 1 to the 5V system
INTERFACING TO A 5V SYSTEM
OPEN-DRAIN OUTPUTS
RD7
DDMAX
; set up LAT register so
; changing TRIS bit will
; drive line low
of the PIC18F46J11 family is 3.6V,
IH
+5V SYSTEM HARDWARE
INTERFACE
COMMUNICATING WITH
THE +5V SYSTEM
of the target system is above
+5V
+5V Device
The open-drain option is implemented on port pins
specifically associated with the data and clock outputs
of the EUSARTs, the MSSP modules (in SPI mode) and
the ECCP modules. It is selectively enabled by setting
the open-drain control bit for the corresponding module
in the ODCON registers (Register 9-1, Register 9-2
and Register 9-3). Their configuration is discussed in
more detail with the individual port where these
peripherals are multiplexed.
When the open-drain option is required, the output pin
must also be tied through an external pull-up resistor
provided by the user to a higher voltage level, up to
5.5V (Figure 9-3). When a digital logic high signal is
output, it is pulled up to the higher voltage level.
FIGURE 9-3:
9.1.5
Many of the digital I/O ports use Schmitt Trigger (ST)
input buffers. While this form of buffering works well
with many types of input, some applications may
require TTL level signals to interface with external logic
devices. This is particularly true for the Parallel Master
Port (PMP), which is likely to be interfaced to TTL level
logic or memory devices.
The inputs for the PMP can be optionally configured for
TTL buffers with the PMPTTL bit in the PADCFG1 reg-
ister (Register 9-4). Setting this bit configures all data
and control input pins for the PMP to use TTL buffers.
By default, these PMP inputs use the port’s ST buffers.
3.3V
TTL INPUT BUFFER OPTION
V
DD
PIC18F46J11
(at logic ‘1’)
USING THE OPEN-DRAIN
OUTPUT (USART SHOWN
AS EXAMPLE)
© 2009 Microchip Technology Inc.
TX
X
+5V
5V
Related parts for PIC18F24J11-I/SP
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![TC1014-2.7VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1014-5.0VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1055-2.5VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1055-2.7VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1055-2.8VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1055-4.0VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1186-2.5VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1186-2.85VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet: