PIC16F1937-I/ML Microchip Technology, PIC16F1937-I/ML Datasheet - Page 103

IC PIC MCU FLASH 512KX14 44-QFN

PIC16F1937-I/ML

Manufacturer Part Number
PIC16F1937-I/ML
Description
IC PIC MCU FLASH 512KX14 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1937-I/ML

Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Controller Family/series
PIC16F
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
32MHz
No. Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7.5.5
The PIR1 register contains the interrupt flag bits, as
shown in Register 7-5.
REGISTER 7-5:
 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
TMR1GIF
R/W-0/0
PIR1 REGISTER
TMR1GIF: Timer1 Gate Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
ADIF: A/D Converter Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
RCIF: USART Receive Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TXIF: USART Transmit Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
SSPIF: Synchronous Serial Port (MSSP) Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CCP1IF: CCP1 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TMR2IF: Timer2 to PR2 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TMR1IF: Timer1 Overflow Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
R/W-0/0
ADIF
PIR1: PERIPHERAL INTERRUPT REQUEST REGISTER 1
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R-0/0
RCIF
R-0/0
TXIF
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
SSPIF
PIC16F193X/LF193X
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
R/W-0/0
CCP1IF
software
R/W-0/0
TMR2IF
should
DS41364D-page 103
ensure
R/W-0/0
TMR1IF
bit 0
the

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