PIC16F1938-I/ML Microchip Technology, PIC16F1938-I/ML Datasheet - Page 80

IC MCU 8BIT FLASH 28QFN

PIC16F1938-I/ML

Manufacturer Part Number
PIC16F1938-I/ML
Description
IC MCU 8BIT FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1938-I/ML

Core Size
8-Bit
Program Memory Size
28KB (16K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1024Byte
Cpu Speed
32MHz
Package
28QFN EP
Device Core
PIC
Family Name
PIC16
Maximum Speed
32 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
25
Interface Type
I2C/SPI/USART
On-chip Adc
11-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1938-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F193X/LF193X
4.5.6
The PIR2 register contains the interrupt flag bits, as
shown in Register 4-6.
REGISTER 4-6:
DS41364C-page 80
bit 7
Legend:
R = Readable bit
u = bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0/0
OSFIF
PIR2 REGISTER
OSFIF: Oscillator Fail Interrupt Flag
1 = System oscillator failed, clock input has changed to INTOSC (must be cleared in software)
0 = No oscillator failure has been detected
C2IF: Comparator C2 Interrupt Flag
1 = An enabled edge was detected on Comparator C2 (must be cleared in software)
0 = No enabled edge was detected on Comparator C2
C1IF: Comparator C1 Interrupt Flag
1 = An enabled edge was detected on Comparator C1 (must be cleared in software)
0 = No enabled edge was detected on Comparator C1
EEIF: EEPROM Write Completion Interrupt Flag bit
1 = The EEPROM Write operation has completed (must be cleared in software)
0 = The EEPROM Write operation has not completed or has not been started
BCLIF: MSSP Bus Collision Interrupt Flag bit
1 = A Bus Collision was detected (must be cleared in software)
0 = No Bus collision was detected
LCDIF: LCD Module Interrupt Flag bit
1 = The LCD module has completed displaying a frame (must be cleared in software).
0 = The LCD module has not completed displaying a frame
Unimplemented: Read as ‘0’
CCP2IF: CCP2 Interrupt Flag bit
Capture Mode
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare Mode
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM Mode
Unused in this mode
R/W-0/0
C2IF
PIR2: PERIPHERAL INTERRUPT REQUEST REGISTER 2
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
C1IF
R/W-0/0
EEIF
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
BCLIF
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE of the INTCON register.
User
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
R/W-0/0
LCDIF
software
© 2009 Microchip Technology Inc.
U-0
should
ensure
R/W-0/0
CCP2IF
bit 0
the

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