PIC16F1938-I/ML Microchip Technology, PIC16F1938-I/ML Datasheet - Page 224

IC MCU 8BIT FLASH 28QFN

PIC16F1938-I/ML

Manufacturer Part Number
PIC16F1938-I/ML
Description
IC MCU 8BIT FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1938-I/ML

Core Size
8-Bit
Program Memory Size
28KB (16K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1024Byte
Cpu Speed
32MHz
Package
28QFN EP
Device Core
PIC
Family Name
PIC16
Maximum Speed
32 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
25
Interface Type
I2C/SPI/USART
On-chip Adc
11-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1938-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F193X/LF193X
20.2
The factory calibrates the internal oscillator block out-
put (INTOSC). However, the INTOSC frequency may
drift as V
affects the asynchronous baud rate. Two methods may
be used to adjust the baud rate clock, but both require
a reference clock source of some kind.
REGISTER 20-1:
DS41364C-page 224
bit 7
Legend:
R = Readable bit
u = bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-/0
CSRC
Clock Accuracy with
Asynchronous Operation
DD
SREN/CREN overrides TXEN in Sync mode.
or temperature changes, and this directly
CSRC: Clock Source Select bit
Asynchronous mode:
Don’t care
Synchronous mode:
1 =
0 =
TX9: 9-bit Transmit Enable bit
1 =
0 =
TXEN: Transmit Enable bit
1 = Transmit enabled
0 = Transmit disabled
SYNC: EUSART Mode Select bit
1 = Synchronous mode
0 = Asynchronous mode
SENDB: Send Break Character bit
Asynchronous mode:
1 = Send Sync Break on next transmission (cleared by hardware upon completion)
0 = Sync Break transmission completed
Synchronous mode:
Don’t care
BRGH: High Baud Rate Select bit
Asynchronous mode:
1 = High speed
0 = Low speed
Synchronous mode:
Unused in this mode
TRMT: Transmit Shift Register Status bit
1 = TSR empty
0 = TSR full
TX9D: Ninth bit of Transmit Data
Can be address/data bit or a parity bit.
R/W-0/0
TX9
Master mode (clock generated internally from BRG)
Slave mode (clock from external source)
Selects 9-bit transmission
Selects 8-bit transmission
TXSTA: TRANSMIT STATUS AND CONTROL REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
TXEN
(1)
(1)
R/W-0/0
SYNC
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
SENDB
The first (preferred) method uses the OSCTUNE
register to adjust the INTOSC output. Adjusting the
value in the OSCTUNE register allows for fine resolution
changes to the system clock source. See Section 8.5
“Internal Clock Modes” for more information.
The other method adjusts the value in the Baud Rate
Generator. This can be done automatically with the
Auto-Baud
“Auto-Baud Detect”). There may not be fine enough
resolution when adjusting the Baud Rate Generator to
compensate for a gradual change in the peripheral
clock frequency.
Detect
R/W-0/0
BRGH
feature
© 2009 Microchip Technology Inc.
TRMT
R-1/1
(see
Section 20.3.1
R/W-0/0
TX9D
bit 0

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