ATTINY13-20MU Atmel, ATTINY13-20MU Datasheet - Page 55

• Manufacturer Part Number: ATTINY13-20MU
• Description: IC MCU AVR 1K FLASH 10MHZ 20-MLF
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY13-20MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (512 x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-MLF®, QFN
• Processor Series: ATTINY1x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAKSTK511
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Package: 20MLF EP
• Device Core: AVR
• Family Name: ATtiny
• Maximum Speed: 20 MHz
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / Rohs Status: Details

2535J–AVR–08/10
Table 10-3.
Table 10-4
shown in
Table 10-4.
Note:
Signal
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
1. 1 when the fuse is “0” (Programmed).
Figure 10-5 on page
Port Pin
PB5/RESET/ADC0/PCINT5
RSTDISBL
1
RSTDISBL
debugWire Transmit
0
0
0
RSTDISBL
PCIE + ADC0D)
ADC0D
PCINT5 Input
RESET Input, ADC0 Input
PB5
PB4
PB3
PB2
PB1
PB0
and
Port B Pins Alternate Functions
Overriding Signals for Alternate Functions in PB5:PB3
Table 10-5
(1)
(1)
(1)
• DWEN
• DWEN
+ (PCINT5 •
Alternate Function
RESET: Reset Pin
dW:
ADC0:
PCINT5: Pin Change Interrupt, Source 5
ADC2:
PCINT4: Pin Change Interrupt 0, Source 4
CLKI:
ADC3:
PCINT3: Pin Change Interrupt 0, Source 3
SCK:
ADC1:
T0:
PCINT2: Pin Change Interrupt 0, Source 2
MISO:
AIN1:
OC0B: Timer/Counter0 Compare Match B Output
INT0:
PCINT1:Pin Change Interrupt 0, Source 1
MOSI:: SPI Master Data Output / Slave Data Input
AIN0:
OC0A: Timer/Counter0 Compare Match A output
PCINT0: Pin Change Interrupt 0, Source 0
relate the alternate functions of Port B to the overriding signals
53.
(1)
(1)
debugWIRE I/O
ADC Input Channel 0
ADC Input Channel 2
External Clock Input
ADC Input Channel 3
Serial Clock Input
ADC Input Channel 1
Timer/Counter0 Clock Source.
SPI Master Data Input / Slave Data Output
Analog Comparator, Negative Input
External Interrupt 0 Input
Analog Comparator, Positive Input
PB4/ADC2/PCINT4
0
0
0
0
0
0
0
PCINT4 • PCIE + ADC2D
ADC2D
PCINT4 Input
ADC2 Input
ADC3 Input
PB3/ADC3/CLKI/PCINT3
0
0
0
0
0
0
0
PCINT3 • PCIE + ADC3D
ADC3D
PCINT3 Input
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