PIC12F519-I/SN Microchip Technology, PIC12F519-I/SN Datasheet - Page 32

no-image

PIC12F519-I/SN

Manufacturer Part Number
PIC12F519-I/SN
Description
IC PIC MCU FLASH 1KX12 8SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F519-I/SN

Program Memory Type
FLASH
Program Memory Size
1.5KB (1K x 12)
Package / Case
8-SOIC (3.9mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Peripherals
POR, WDT
Number Of I /o
5
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
41 B
Interface Type
USB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
6
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
Height
1.25 mm
Length
4.9 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
3.9 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12F519-I/SN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC12F519-I/SN
0
PIC12F519
6.4
6.4.1
Some instructions operate internally as read followed
by write operations. The BCF and BSF instructions, for
example, read the entire port into the CPU, execute the
bit operation and re-write the result. Caution must be
used when these instructions are applied to a port
where one or more pins are used as input/outputs. For
example, a BSF operation on bit 5 of GPIO will cause
all eight bits of GPIO to be read into the CPU, bit 5 to
be set and the GPIO value to be written to the output
latches. If another bit of GPIO is used as a bidirectional
I/O pin (say bit 0) and it is defined as an input at this
time, the input signal present on the pin itself would be
read into the CPU and rewritten to the data latch of this
particular pin, overwriting the previous content. As long
as the pin stays in the Input mode, no problem occurs.
However, if bit 0 is switched into Output mode later on,
the content of the data latch may now be unknown.
Example 6-1 shows the effect of two sequential
Read-Modify-Write instructions (e.g., BCF, BSF, etc.)
on an I/O port.
A pin actively outputting a high or a low should not be
driven from external devices at the same time in order
to change the level on this pin (“wired OR”, “wired
AND”). The resulting high output currents may damage
the chip.
FIGURE 6-6:
DS41319B-page 30
Instruction
Instruction
Executed
GP<5:0>
Fetched
I/O Programming Considerations
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
MOVWF GPIO
BIDIRECTIONAL I/O PORTS
PC
SUCCESSIVE I/O OPERATION
MOVF GPIO, W
(Write to GPIO)
MOVWF GPIO
Port pin
written here
PC + 1
MOVF PORTB,W
(Read PORTB)
Port pin
sampled here
NOP
PC + 2
PC + 3
NOP
NOP
EXAMPLE 6-1:
6.4.2
The actual write to an I/O port happens at the end of an
instruction cycle, whereas for reading, the data must be
valid at the beginning of the instruction cycle (Figure 6-6).
Therefore, care must be exercised if a write followed by
a read operation is carried out on the same I/O port. The
sequence of instructions should allow the pin voltage to
stabilize (load dependent) before the next instruction
causes that file to be read into the CPU. Otherwise, the
previous state of that pin may be read into the CPU rather
than the new state. When in doubt, it is better to separate
these instructions with a NOP or another instruction not
accessing this I/O port.
;Initial GPIO Settings
;GPIO<5:3> Inputs
;GPIO<2:0> Outputs
;
;
;
;
Note 1:
BCF
BCF
MOVLW
TRIS
GPIO, 5
GPIO, 4
007h;
GPIO
The user may have expected the pin values to
be ‘--00 pppp’. The 2nd BCF caused GP5 to
be latched as the pin value (High).
SUCCESSIVE OPERATIONS ON
I/O PORTS
This example shows a write to GPIO followed
by a read from GPIO.
Data setup time = (0.25 T
where: T
Therefore, at higher clock frequencies, a
write followed by a read may be problematic.
T
CY
PD
;--01 -ppp
;--10 -ppp
;--10 -ppp
GPIO latch
----------
READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT
= instruction cycle.
= propagation delay
© 2008 Microchip Technology Inc.
CY
– T
GPIO pins
----------
--11 pppp
--11 pppp
--11 pppp
PD
)

Related parts for PIC12F519-I/SN